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Searched refs:reg3 (Results 1 – 19 of 19) sorted by relevance

/arch/arm/lib/
Dcopy_from_user.S46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
49 ldr1w \ptr, \reg3, \abort
53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4})
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
Dmemcpy.S21 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
22 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
Dcopy_to_user.S40 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
41 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
67 str1w \ptr, \reg3, \abort
83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
Dcsumpartialcopy.S43 .macro load4l, reg1, reg2, reg3, reg4
44 ldmia r0!, {\reg1, \reg2, \reg3, \reg4}
Dcsumpartialcopyuser.S56 .macro load4l, reg1, reg2, reg3, reg4
59 ldrusr \reg3, r0, 4
/arch/arm/kernel/
Dhyp-stub.S29 .macro store_primary_cpu_mode reg1, reg2, reg3 argument
33 ldr \reg3, [\reg2]
34 str \reg1, [\reg2, \reg3]
43 .macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3 argument
45 ldr \reg3, [\reg2]
46 ldr \reg1, [\reg2, \reg3]
49 strne \reg1, [\reg2, \reg3] @ record what happened and give up
54 .macro store_primary_cpu_mode reg1:req, reg2:req, reg3:req
61 .macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3 argument
/arch/arm/probes/kprobes/
Dtest-core.h246 #define TEST_RRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
247 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
250 TEST_ARG_REG(reg3, val3) \
252 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
255 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \ argument
256 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4 #reg4) \
259 TEST_ARG_REG(reg3, val3) \
262 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3 #reg3 code4 #reg4) \
288 #define TEST_PRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
289 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
[all …]
/arch/unicore32/lib/
Dcopy_to_user.S37 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
38 ldm.w (\reg1, \reg2, \reg3, \reg4), [\ptr]+
41 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
42 ldm.w (\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8), [\ptr]+
54 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
55 100: stm.w (\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8), [\ptr]+
Dcopy_from_user.S37 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
38 100: ldm.w (\reg1, \reg2, \reg3, \reg4), [\ptr]+
45 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
46 100: ldm.w (\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8), [\ptr]+
61 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
62 stm.w (\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8), [\ptr]+
/arch/arm64/include/asm/
Dkvm_ptrauth.h69 .macro ptrauth_switch_to_guest g_ctxt, reg1, reg2, reg3
81 ptrauth_restore_state \reg1, \reg2, \reg3
85 .macro ptrauth_switch_to_host g_ctxt, h_ctxt, reg1, reg2, reg3
97 ptrauth_save_state \reg1, \reg2, \reg3
99 ptrauth_restore_state \reg1, \reg2, \reg3
105 .macro ptrauth_switch_to_guest g_ctxt, reg1, reg2, reg3
107 .macro ptrauth_switch_to_host g_ctxt, h_ctxt, reg1, reg2, reg3
/arch/s390/kernel/
Dcpcmd.c30 register unsigned long reg3 asm ("3") = cmdlen; in diag8_noresponse()
34 : "+d" (reg3) : "d" (reg2) : "cc"); in diag8_noresponse()
35 return reg3; in diag8_noresponse()
43 register unsigned long reg3 asm ("3") = (addr_t) response; in diag8_response()
53 : "d" (reg2), "d" (reg3), "d" (*rlen) : "cc"); in diag8_response()
/arch/s390/kvm/
Dtrace.h287 TP_PROTO(VCPU_PROTO_COMMON, int g, int reg1, int reg3, u64 addr),
288 TP_ARGS(VCPU_ARGS_COMMON, g, reg1, reg3, addr),
294 __field(int, reg3)
302 __entry->reg3 = reg3;
308 __entry->reg1, __entry->reg3, __entry->addr)
312 TP_PROTO(VCPU_PROTO_COMMON, int g, int reg1, int reg3, u64 addr),
313 TP_ARGS(VCPU_ARGS_COMMON, g, reg1, reg3, addr),
319 __field(int, reg3)
327 __entry->reg3 = reg3;
333 __entry->reg1, __entry->reg3, __entry->addr)
Dpriv.c1279 int reg3 = vcpu->arch.sie_block->ipa & 0x000f; in kvm_s390_handle_lctl() local
1295 VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); in kvm_s390_handle_lctl()
1296 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga); in kvm_s390_handle_lctl()
1298 nr_regs = ((reg3 - reg1) & 0xf) + 1; in kvm_s390_handle_lctl()
1307 if (reg == reg3) in kvm_s390_handle_lctl()
1318 int reg3 = vcpu->arch.sie_block->ipa & 0x000f; in kvm_s390_handle_stctl() local
1334 VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); in kvm_s390_handle_stctl()
1335 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga); in kvm_s390_handle_stctl()
1341 if (reg == reg3) in kvm_s390_handle_stctl()
1352 int reg3 = vcpu->arch.sie_block->ipa & 0x000f; in handle_lctlg() local
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/arch/m68k/atari/
Ddebug.c219 int clksrc, clkmode, div, reg3, reg5; in atari_init_scc_port() local
239 reg3 = (cflag & CSIZE) == CS8 ? 0xc0 : 0x40; in atari_init_scc_port()
247 SCC_WRITE(3, reg3); in atari_init_scc_port()
257 SCC_WRITE(3, reg3 | 1); in atari_init_scc_port()
/arch/s390/include/asm/
Dchecksum.h33 register unsigned long reg3 asm("3") = (unsigned long) len; in csum_partial()
38 : "+d" (sum), "+d" (reg2), "+d" (reg3) : : "cc", "memory"); in csum_partial()
Dap.h309 register unsigned long reg3 asm ("3") = (unsigned long) length; in ap_nqap()
316 : "+d" (reg0), "=d" (reg1), "+d" (reg2), "+d" (reg3) in ap_nqap()
Dpage.h59 register unsigned long reg3 asm ("3") = 0x1000; in copy_page()
64 : "+d" (reg2), "+d" (reg3), "+d" (reg4), "+d" (reg5) in copy_page()
Dpgtable.h551 register unsigned long reg3 asm("3") = new; in csp()
557 : "d" (reg3), "d" (address) in csp()
564 register unsigned long reg3 asm("3") = new; in cspg()
570 : "d" (reg3), "d" (address) in cspg()
585 register unsigned long reg3 asm("3") = new; in crdte()
591 : "d" (reg3), "d" (reg4), "d" (reg5), "a" (asce) in crdte()
/arch/sparc/lib/
Dcopy_page.S38 #define TOUCH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7) \ argument
40 fsrc2 %reg2, %f52; fsrc2 %reg3, %f54; \