/arch/sparc/kernel/ |
D | visemul.c | 140 static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2, in maybe_flush_windows() argument 143 if (rs2 >= 16 || rs1 >= 16 || rd >= 16) { in maybe_flush_windows() 296 unsigned long orig_rs1, rs1, orig_rs2, rs2, rd_val; in edge() local 301 orig_rs2 = rs2 = fetch_reg(RS2(insn), regs); in edge() 305 rs2 = rs2 & 0xffffffff; in edge() 312 right = edge8_tab[rs2 & 0x7].right; in edge() 317 right = edge8_tab_l[rs2 & 0x7].right; in edge() 323 right = edge16_tab[(rs2 >> 1) & 0x3].right; in edge() 329 right = edge16_tab_l[(rs2 >> 1) & 0x3].right; in edge() 335 right = edge32_tab[(rs2 >> 2) & 0x1].right; in edge() [all …]
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D | unaligned_32.c | 71 static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2, in maybe_flush_windows() argument 74 if(rs2 >= 16 || rs1 >= 16 || rd >= 16) { in maybe_flush_windows() 139 unsigned int rs2 = insn & 0x1f; in compute_effective_address() local 146 maybe_flush_windows(rs1, rs2, rd); in compute_effective_address() 147 return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs)); in compute_effective_address() 155 unsigned int rs2 = insn & 0x1f; in safe_compute_effective_address() local 162 maybe_flush_windows(rs1, rs2, rd); in safe_compute_effective_address() 163 return (safe_fetch_reg(rs1, regs) + safe_fetch_reg(rs2, regs)); in safe_compute_effective_address()
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D | unaligned_64.c | 104 static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2, in maybe_flush_windows() argument 107 if (rs2 >= 16 || rs1 >= 16 || rd >= 16) { in maybe_flush_windows() 174 unsigned int rs2 = insn & 0x1f; in compute_effective_address() local 181 maybe_flush_windows(rs1, rs2, rd, from_kernel); in compute_effective_address() 182 addr = (fetch_reg(rs1, regs) + fetch_reg(rs2, regs)); in compute_effective_address()
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/arch/sparc/math-emu/ |
D | math_64.c | 359 argp rs1 = NULL, rs2 = NULL, rd = NULL; in do_mathemu() local 398 case 1: rs2 = (argp)&f->regs[freg]; in do_mathemu() 401 rs2 = (argp)&zero; in do_mathemu() 405 case 7: FP_UNPACK_QP (QB, rs2); break; in do_mathemu() 406 case 6: FP_UNPACK_DP (DB, rs2); break; in do_mathemu() 407 case 5: FP_UNPACK_SP (SB, rs2); break; in do_mathemu() 457 case FMOVQ: rd->q[0] = rs2->q[0]; rd->q[1] = rs2->q[1]; break; in do_mathemu() 458 case FABSQ: rd->q[0] = rs2->q[0] & 0x7fffffffffffffffUL; rd->q[1] = rs2->q[1]; break; in do_mathemu() 459 case FNEGQ: rd->q[0] = rs2->q[0] ^ 0x8000000000000000UL; rd->q[1] = rs2->q[1]; break; in do_mathemu() 468 case FITOQ: IR = rs2->s; FP_FROM_INT_Q (QR, IR, 32, int); break; in do_mathemu() [all …]
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D | math_32.c | 284 argp rs1 = NULL, rs2 = NULL, rd = NULL; in do_one_mathemu() local 390 rs2 = (argp)&fregs[freg]; in do_one_mathemu() 392 case 7: FP_UNPACK_QP (QB, rs2); break; in do_one_mathemu() 393 case 6: FP_UNPACK_DP (DB, rs2); break; in do_one_mathemu() 394 case 5: FP_UNPACK_SP (SB, rs2); break; in do_one_mathemu() 452 case FMOVS: rd->s = rs2->s; break; in do_one_mathemu() 453 case FABSS: rd->s = rs2->s & 0x7fffffff; break; in do_one_mathemu() 454 case FNEGS: rd->s = rs2->s ^ 0x80000000; break; in do_one_mathemu() 460 case FITOS: IR = rs2->s; FP_FROM_INT_S (SR, IR, 32, int); break; in do_one_mathemu() 461 case FITOD: IR = rs2->s; FP_FROM_INT_D (DR, IR, 32, int); break; in do_one_mathemu() [all …]
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/arch/riscv/net/ |
D | bpf_jit_comp.c | 167 static u32 rv_r_insn(u8 funct7, u8 rs2, u8 rs1, u8 funct3, u8 rd, u8 opcode) in rv_r_insn() argument 169 return (funct7 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | in rv_r_insn() 179 static u32 rv_s_insn(u16 imm11_0, u8 rs2, u8 rs1, u8 funct3, u8 opcode) in rv_s_insn() argument 183 return (imm11_5 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | in rv_s_insn() 187 static u32 rv_sb_insn(u16 imm12_1, u8 rs2, u8 rs1, u8 funct3, u8 opcode) in rv_sb_insn() argument 192 return (imm12 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | in rv_sb_insn() 211 static u32 rv_amo_insn(u8 funct5, u8 aq, u8 rl, u8 rs2, u8 rs1, in rv_amo_insn() argument 216 return rv_r_insn(funct7, rs2, rs1, funct3, rd, opcode); in rv_amo_insn() 229 static u32 rv_addw(u8 rd, u8 rs1, u8 rs2) in rv_addw() argument 231 return rv_r_insn(0, rs2, rs1, 0, rd, 0x3b); in rv_addw() [all …]
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/arch/arm64/boot/dts/arm/ |
D | rtsm_ve-motherboard-rs2.dtsi | 5 * "rs2" extension for the v2m motherboard 10 arm,v2m-memory-map = "rs2";
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D | fvp-base-revc.dts | 18 #include "rtsm_ve-motherboard-rs2.dtsi"
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/arch/arm/kernel/ |
D | sleep.S | 38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask 48 ARM( orr \dst, \dst, \mask, lsr \rs2 ) @ dst|=(aff2>>rs2) 49 THUMB( lsr \mask, \mask, \rs2 )
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/arch/arm64/kernel/ |
D | sleep.S | 38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask 46 lsr \mask ,\mask, \rs2
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/arch/sparc/net/ |
D | bpf_jit_comp_64.c | 1260 u32 opcode = 0, rs2; in build_insn() local 1280 rs2 = S13(off); in build_insn() 1283 rs2 = RS2(tmp); in build_insn() 1285 emit(opcode | RS1(src) | rs2 | RD(dst), ctx); in build_insn() 1300 u32 opcode = 0, rs2; in build_insn() local 1325 rs2 = S13(off); in build_insn() 1329 rs2 = RS2(tmp); in build_insn() 1331 emit(opcode | RS1(dst) | rs2 | RD(tmp2), ctx); in build_insn() 1341 u32 opcode = 0, rs2; in build_insn() local 1362 rs2 = S13(off); in build_insn() [all …]
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