| /arch/arm/kernel/ |
| D | smp_scu.c | 29 unsigned int __init scu_get_core_count(void __iomem *scu_base) in scu_get_core_count() argument
31 unsigned int ncores = readl_relaxed(scu_base + SCU_CONFIG); in scu_get_core_count()
38 void scu_enable(void __iomem *scu_base) in scu_enable() argument
45 scu_ctrl = readl_relaxed(scu_base + 0x30); in scu_enable()
47 writel_relaxed(scu_ctrl | 0x1, scu_base + 0x30); in scu_enable()
51 scu_ctrl = readl_relaxed(scu_base + SCU_CTRL); in scu_enable()
63 writel_relaxed(scu_ctrl, scu_base + SCU_CTRL); in scu_enable()
73 static int scu_set_power_mode_internal(void __iomem *scu_base, in scu_set_power_mode_internal() argument
83 val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu); in scu_set_power_mode_internal()
86 writeb_relaxed(val, scu_base + SCU_CPU_STATUS + cpu); in scu_set_power_mode_internal()
[all …]
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| /arch/arm/include/asm/ |
| D | smp_scu.h | 32 int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu);
34 static inline unsigned int scu_get_core_count(void __iomem *scu_base) in scu_get_core_count() argument
38 static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode) in scu_power_mode() argument
42 static inline int scu_cpu_power_enable(void __iomem *scu_base, in scu_cpu_power_enable() argument
47 static inline int scu_get_cpu_power_mode(void __iomem *scu_base, in scu_get_cpu_power_mode() argument
55 void scu_enable(void __iomem *scu_base);
57 static inline void scu_enable(void __iomem *scu_base) {} in scu_enable() argument
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| /arch/arm/mach-ux500/ |
| D | platsmp.c | 34 static void __iomem *scu_base; in ux500_smp_prepare_cpus() local
55 scu_base = of_iomap(np, 0); in ux500_smp_prepare_cpus()
57 if (!scu_base) { in ux500_smp_prepare_cpus()
62 scu_enable(scu_base); in ux500_smp_prepare_cpus()
63 ncores = scu_get_core_count(scu_base); in ux500_smp_prepare_cpus()
66 iounmap(scu_base); in ux500_smp_prepare_cpus()
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| /arch/arm/mach-realview/ |
| D | platsmp-dt.c | 38 void __iomem *scu_base; in realview_smp_prepare_cpus() local
48 scu_base = of_iomap(np, 0); in realview_smp_prepare_cpus()
50 if (!scu_base) { in realview_smp_prepare_cpus()
55 scu_enable(scu_base); in realview_smp_prepare_cpus()
56 ncores = scu_get_core_count(scu_base); in realview_smp_prepare_cpus()
60 iounmap(scu_base); in realview_smp_prepare_cpus()
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| /arch/arm/mach-bcm/ |
| D | bcm63xx_smp.c | 38 void __iomem *scu_base; in scu_a9_enable() local
53 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
54 if (!scu_base) { in scu_a9_enable()
60 scu_enable(scu_base); in scu_a9_enable()
62 ncores = scu_base ? scu_get_core_count(scu_base) : 1; in scu_a9_enable()
94 iounmap(scu_base); /* That's the last we'll need of this */ in scu_a9_enable()
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| D | platsmp.c | 48 void __iomem *scu_base; in scu_a9_enable() local
62 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); in scu_a9_enable()
63 if (!scu_base) { in scu_a9_enable()
69 scu_enable(scu_base); in scu_a9_enable()
71 iounmap(scu_base); /* That's the last we'll need of this */ in scu_a9_enable()
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| /arch/arm/mach-npcm/ |
| D | platsmp.c | 58 void __iomem *scu_base; in npcm7xx_smp_prepare_cpus() local
65 scu_base = of_iomap(scu_np, 0); in npcm7xx_smp_prepare_cpus()
66 if (!scu_base) { in npcm7xx_smp_prepare_cpus()
71 scu_enable(scu_base); in npcm7xx_smp_prepare_cpus()
73 iounmap(scu_base); in npcm7xx_smp_prepare_cpus()
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| /arch/arm/mach-oxnas/ |
| D | platsmp.c | 62 void __iomem *scu_base; in ox820_smp_prepare_cpus() local
65 scu_base = of_iomap(np, 0); in ox820_smp_prepare_cpus()
67 if (!scu_base) in ox820_smp_prepare_cpus()
83 scu_enable(scu_base); in ox820_smp_prepare_cpus()
87 iounmap(scu_base); in ox820_smp_prepare_cpus()
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| /arch/arm/mach-zx/ |
| D | platsmp.c | 39 static void __iomem *scu_base; variable
49 scu_base = ioremap(base, SZ_256); in zx_smp_prepare_cpus()
50 if (!scu_base) { in zx_smp_prepare_cpus()
55 scu_enable(scu_base); in zx_smp_prepare_cpus()
163 scu_power_mode(scu_base, SCU_PM_POWEROFF); in zx_cpu_die()
173 scu_power_mode(scu_base, SCU_PM_NORMAL); in zx_secondary_init()
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| /arch/arm/mach-berlin/ |
| D | platsmp.c | 61 void __iomem *scu_base; in berlin_smp_prepare_cpus() local
65 scu_base = of_iomap(np, 0); in berlin_smp_prepare_cpus()
67 if (!scu_base) in berlin_smp_prepare_cpus()
80 scu_enable(scu_base); in berlin_smp_prepare_cpus()
96 iounmap(scu_base); in berlin_smp_prepare_cpus()
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| /arch/arm/mach-imx/ |
| D | platsmp.c | 21 static void __iomem *scu_base; variable
40 scu_base = IMX_IO_ADDRESS(base); in imx_scu_map_io()
58 ncores = scu_get_core_count(scu_base); in imx_smp_init_cpus()
66 scu_enable(scu_base); in imx_smp_prepare()
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| /arch/arm/mach-omap2/ |
| D | omap-smp.c | 47 void __iomem *scu_base; member
71 return cfg.scu_base; in omap4_get_scu_base()
270 cfg.scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base()); in omap4_smp_init_cpus()
271 BUG_ON(!cfg.scu_base); in omap4_smp_init_cpus()
272 ncores = scu_get_core_count(cfg.scu_base); in omap4_smp_init_cpus()
390 if (cfg.scu_base) in omap4_smp_prepare_cpus()
391 scu_enable(cfg.scu_base); in omap4_smp_prepare_cpus()
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| D | pm33xx-core.c | 34 static void __iomem *scu_base; variable
39 scu_base = ioremap(scu_a9_get_base(), SZ_256); in am43xx_map_scu()
41 if (!scu_base) in am43xx_map_scu()
170 scu_power_mode(scu_base, SCU_PM_POWEROFF); in am43xx_suspend()
172 scu_power_mode(scu_base, SCU_PM_NORMAL); in am43xx_suspend()
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| /arch/arm/mach-sti/ |
| D | platsmp.c | 52 void __iomem *scu_base; in sti_smp_prepare_cpus() local
59 scu_base = of_iomap(np, 0); in sti_smp_prepare_cpus()
60 scu_enable(scu_base); in sti_smp_prepare_cpus()
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| /arch/arm/mach-hisi/ |
| D | platsmp.c | 42 void __iomem *scu_base = NULL; in hisi_enable_scu_a9() local
46 scu_base = ioremap(base, SZ_4K); in hisi_enable_scu_a9()
47 if (!scu_base) { in hisi_enable_scu_a9()
51 scu_enable(scu_base); in hisi_enable_scu_a9()
52 iounmap(scu_base); in hisi_enable_scu_a9()
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| /arch/arm/mach-spear/ |
| D | platsmp.c | 39 static void __iomem *scu_base = IOMEM(VA_SCU_BASE); variable
100 unsigned int i, ncores = scu_get_core_count(scu_base); in spear13xx_smp_init_cpus()
115 scu_enable(scu_base); in spear13xx_smp_prepare_cpus()
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| /arch/arm/mach-meson/ |
| D | platsmp.c | 35 static void __iomem *scu_base; variable
94 scu_base = of_iomap(node, 0); in meson_smp_prepare_cpus()
96 if (!scu_base) { in meson_smp_prepare_cpus()
101 scu_enable(scu_base); in meson_smp_prepare_cpus()
131 scu_cpu_power_enable(scu_base, cpu); in meson_smp_begin_secondary_boot()
301 scu_power_mode(scu_base, SCU_PM_POWEROFF); in meson8_smp_cpu_die()
317 power_mode = scu_get_cpu_power_mode(scu_base, cpu); in meson8_smp_cpu_kill()
359 power_mode = scu_get_cpu_power_mode(scu_base, cpu); in meson8b_smp_cpu_kill()
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| /arch/arm/mach-mvebu/ |
| D | board-v7.c | 36 static void __iomem *scu_base; variable
47 scu_base = of_iomap(np, 0); in mvebu_scu_enable()
48 scu_enable(scu_base); in mvebu_scu_enable()
55 return scu_base; in mvebu_get_scu_base()
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| /arch/arm/mach-exynos/ |
| D | platsmp.c | 175 static void __iomem *scu_base; in exynos_scu_enable() local
177 if (!scu_base) { in exynos_scu_enable()
180 scu_base = of_iomap(np, 0); in exynos_scu_enable()
183 scu_base = ioremap(scu_a9_get_base(), SZ_4K); in exynos_scu_enable()
186 scu_enable(scu_base); in exynos_scu_enable()
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