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Searched refs:slice (Results 1 – 14 of 14) sorted by relevance

/arch/mips/sgi-ip27/
Dip27-nmi.c36 void install_cpu_nmi_handler(int slice) in install_cpu_nmi_handler() argument
40 nmi_addr = (nmi_t *)NMI_ADDR(get_nasid(), slice); in install_cpu_nmi_handler()
55 void nmi_cpu_eframe_save(nasid_t nasid, int slice) in nmi_cpu_eframe_save() argument
63 slice * IP27_NMI_KREGS_CPU_SIZE); in nmi_cpu_eframe_save()
65 pr_emerg("NMI nasid %d: slice %d\n", nasid, slice); in nmi_cpu_eframe_save()
131 void nmi_dump_hub_irq(nasid_t nasid, int slice) in nmi_dump_hub_irq() argument
135 if (slice == 0) { /* Slice A */ in nmi_dump_hub_irq()
158 int slice; in nmi_node_eframe_save() local
169 for (slice = 0; slice < NODE_NUM_CPUS(slice); slice++) { in nmi_node_eframe_save()
170 nmi_cpu_eframe_save(nasid, slice); in nmi_node_eframe_save()
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Dip27-klconfig.c81 klcpu_t *nasid_slice_to_cpuinfo(nasid_t nasid, int slice) in nasid_slice_to_cpuinfo() argument
93 if ((acpu->cpu_info.physid) == slice) in nasid_slice_to_cpuinfo()
103 int slice; in sn_get_cpuinfo() local
120 for (slice = 0; slice < CPUS_PER_NODE; slice++) { in sn_get_cpuinfo()
121 acpu = nasid_slice_to_cpuinfo(nasid, slice); in sn_get_cpuinfo()
Dip27-timer.c44 int slice = cputoslice(cpu); in rt_next_event() local
49 LOCAL_HUB_S(PI_RT_COMPARE_A + PI_COUNT_OFFSET * slice, cnt); in rt_next_event()
61 int slice = cputoslice(cpu); in hub_rt_counter_handler() local
66 LOCAL_HUB_S(PI_RT_PEND_A + PI_COUNT_OFFSET * slice, 0); in hub_rt_counter_handler()
Dip27-init.c85 int slice = LOCAL_HUB_L(PI_CPU_NUM); in per_cpu_init() local
89 if (test_and_set_bit(slice, &hub->slice_map)) in per_cpu_init()
Dip27-irq.c258 int slice = LOCAL_HUB_L(PI_CPU_NUM); in install_ipi() local
261 resched = CPU_RESCHED_A_IRQ + slice; in install_ipi()
265 call = CPU_CALL_A_IRQ + slice; in install_ipi()
269 if (slice == 0) { in install_ipi()
/arch/mips/include/asm/sn/
Daddrs.h278 #define EX_HANDLER_OFFSET(slice) ((slice) << 16) argument
279 #define EX_HANDLER_ADDR(nasid, slice) \ argument
280 PHYS_TO_K0(NODE_OFFSET(nasid) | EX_HANDLER_OFFSET(slice))
283 #define EX_FRAME_OFFSET(slice) ((slice) << 16 | 0x400) argument
284 #define EX_FRAME_ADDR(nasid, slice) \ argument
285 PHYS_TO_K0(NODE_OFFSET(nasid) | EX_FRAME_OFFSET(slice))
332 #define LAUNCH_OFFSET(nasid, slice) \ argument
334 KLD_LAUNCH(nasid)->stride * (slice))
335 #define LAUNCH_ADDR(nasid, slice) \ argument
336 TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice))
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Dsn_private.h14 extern void install_cpu_nmi_handler(int slice);
/arch/powerpc/mm/
Dslice.c97 static int slice_low_has_vma(struct mm_struct *mm, unsigned long slice) in slice_low_has_vma() argument
99 return !slice_area_is_free(mm, slice << SLICE_LOW_SHIFT, in slice_low_has_vma()
103 static int slice_high_has_vma(struct mm_struct *mm, unsigned long slice) in slice_high_has_vma() argument
105 unsigned long start = slice << SLICE_HIGH_SHIFT; in slice_high_has_vma()
265 unsigned long slice; in slice_scan_available() local
267 slice = GET_LOW_SLICE_INDEX(addr); in slice_scan_available()
268 *boundary_addr = (slice + end) << SLICE_LOW_SHIFT; in slice_scan_available()
269 return !!(available->low_slices & (1u << slice)); in slice_scan_available()
271 slice = GET_HIGH_SLICE_INDEX(addr); in slice_scan_available()
272 *boundary_addr = (slice + end) ? in slice_scan_available()
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DMakefile16 obj-$(CONFIG_PPC_MM_SLICES) += slice.o
/arch/mips/include/asm/mach-loongson64/
Dmmzone.h33 struct slice_data slice[2]; member
/arch/mips/include/asm/sn/sn0/
Daddrs.h143 #define KERN_NMI_ADDR(nasid, slice) \ argument
145 (IP27_NMI_KREGS_CPU_SIZE * (slice)))
/arch/sparc/include/asm/
Dvio.h157 u8 slice; member
/arch/mips/cavium-octeon/executive/
Dcvmx-spi.c367 gmxx_tx_spi_max.s.slice = 0; in cvmx_spi_calendar_setup_cb()
/arch/mips/include/asm/octeon/
Dcvmx-gmxx-defs.h2196 uint64_t slice:7; member
2202 uint64_t slice:7;