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Searched refs:soc_info (Results 1 – 22 of 22) sorted by relevance

/arch/arm/mach-davinci/
Dcommon.c26 static int __init davinci_init_id(struct davinci_soc_info *soc_info) in davinci_init_id() argument
34 base = ioremap(soc_info->jtag_id_reg, SZ_4K); in davinci_init_id()
40 soc_info->jtag_id = __raw_readl(base); in davinci_init_id()
43 variant = (soc_info->jtag_id & 0xf0000000) >> 28; in davinci_init_id()
44 part_no = (soc_info->jtag_id & 0x0ffff000) >> 12; in davinci_init_id()
46 for (i = 0, dip = soc_info->ids; i < soc_info->ids_num; in davinci_init_id()
50 soc_info->cpu_id = dip->cpu_id; in davinci_init_id()
56 pr_err("Unknown DaVinci JTAG ID 0x%x\n", soc_info->jtag_id); in davinci_init_id()
60 void __init davinci_common_init(const struct davinci_soc_info *soc_info) in davinci_common_init() argument
64 if (!soc_info) { in davinci_common_init()
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Dmux.c36 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_cfg_reg() local
42 if (WARN_ON(!soc_info->pinmux_pins)) in davinci_cfg_reg()
46 pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K); in davinci_cfg_reg()
51 if (index >= soc_info->pinmux_pins_num) { in davinci_cfg_reg()
53 index, soc_info->pinmux_pins_num); in davinci_cfg_reg()
58 cfg = &soc_info->pinmux_pins[index]; in davinci_cfg_reg()
Dtime.c115 struct davinci_soc_info *soc_info = &davinci_soc_info; in timer32_config() local
119 soc_info->timer_info->timers; in timer32_config()
193 struct davinci_soc_info *soc_info = &davinci_soc_info; in timer_init() local
194 struct davinci_timer_instance *dtip = soc_info->timer_info->timers; in timer_init()
338 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_timer_init() local
343 clockevent_id = soc_info->timer_info->clockevent_id; in davinci_timer_init()
344 clocksource_id = soc_info->timer_info->clocksource_id; in davinci_timer_init()
356 soc_info->timer_info->timers; in davinci_timer_init()
Dboard-sffsdr.c121 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_sffsdr_init() local
131 soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID; in davinci_sffsdr_init()
Dboard-neuros-osd2.c176 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_ntosd2_init() local
210 soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID; in davinci_ntosd2_init()
Dboard-mityomapl138.c525 struct davinci_soc_info *soc_info = &davinci_soc_info; in mityomapl138_config_emac() local
527 soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */ in mityomapl138_config_emac()
532 if (soc_info->emac_pdata->rmii_en) { in mityomapl138_config_emac()
550 soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID; in mityomapl138_config_emac()
Dboard-da830-evm.c594 struct davinci_soc_info *soc_info = &davinci_soc_info; in da830_evm_init() local
617 soc_info->emac_pdata->rmii_en = 1; in da830_evm_init()
618 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID; in da830_evm_init()
Dboard-omapl138-hawk.c53 struct davinci_soc_info *soc_info = &davinci_soc_info; in omapl138_hawk_config_emac() local
67 soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; in omapl138_hawk_config_emac()
Dboard-da850-evm.c365 struct davinci_soc_info *soc_info = &davinci_soc_info; in da850_evm_setup_emac_rmii() local
367 soc_info->emac_pdata->rmii_en = 1; in da850_evm_setup_emac_rmii()
1103 struct davinci_soc_info *soc_info = &davinci_soc_info; in da850_evm_config_emac() local
1109 rmii_en = soc_info->emac_pdata->rmii_en; in da850_evm_config_emac()
1142 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; in da850_evm_config_emac()
Dboard-dm365-evm.c738 struct davinci_soc_info *soc_info = &davinci_soc_info; in evm_init_cpld() local
746 soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID; in evm_init_cpld()
Dboard-dm644x-evm.c830 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_evm_init() local
881 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID; in davinci_evm_init()
Dboard-dm646x-evm.c828 struct davinci_soc_info *soc_info = &davinci_soc_info; in evm_init() local
857 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID; in evm_init()
/arch/mips/lantiq/
Dprom.c29 static struct ltq_soc_info soc_info; variable
33 return soc_info.sys_type; in get_system_type()
38 return soc_info.type; in ltq_soc_type()
96 ltq_soc_detect(&soc_info); in prom_init()
97 snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s", in prom_init()
98 soc_info.name, soc_info.rev_type); in prom_init()
99 soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0'; in prom_init()
100 pr_info("SoC: %s\n", soc_info.sys_type); in prom_init()
/arch/mips/ralink/
Dof.c88 else if (soc_info.mem_size) in plat_mem_setup()
89 add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M, in plat_mem_setup()
92 detect_memory_region(soc_info.mem_base, in plat_mem_setup()
93 soc_info.mem_size_min * SZ_1M, in plat_mem_setup()
94 soc_info.mem_size_max * SZ_1M); in plat_mem_setup()
99 __dt_register_buses(soc_info.compatible, "palmbus"); in plat_of_setup()
Drt305x.c217 void prom_soc_init(struct ralink_soc_info *soc_info) in prom_soc_init() argument
235 soc_info->compatible = "ralink,rt3050-soc"; in prom_soc_init()
239 soc_info->compatible = "ralink,rt3052-soc"; in prom_soc_init()
244 soc_info->compatible = "ralink,rt3350-soc"; in prom_soc_init()
248 soc_info->compatible = "ralink,rt3352-soc"; in prom_soc_init()
252 soc_info->compatible = "ralink,rt5350-soc"; in prom_soc_init()
259 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, in prom_soc_init()
265 soc_info->mem_base = RT305X_SDRAM_BASE; in prom_soc_init()
267 soc_info->mem_size = rt5350_get_mem_size(); in prom_soc_init()
270 soc_info->mem_size_min = RT305X_MEM_SIZE_MIN; in prom_soc_init()
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Drt288x.c80 void prom_soc_init(struct ralink_soc_info *soc_info) in prom_soc_init() argument
93 soc_info->compatible = "ralink,r2880-soc"; in prom_soc_init()
99 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, in prom_soc_init()
105 soc_info->mem_base = RT2880_SDRAM_BASE; in prom_soc_init()
106 soc_info->mem_size_min = RT2880_MEM_SIZE_MIN; in prom_soc_init()
107 soc_info->mem_size_max = RT2880_MEM_SIZE_MAX; in prom_soc_init()
Dmt7620.c597 mt7620_dram_init(struct ralink_soc_info *soc_info) in mt7620_dram_init() argument
602 soc_info->mem_size_min = MT7620_SDRAM_SIZE_MIN; in mt7620_dram_init()
603 soc_info->mem_size_max = MT7620_SDRAM_SIZE_MAX; in mt7620_dram_init()
608 soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN; in mt7620_dram_init()
609 soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX; in mt7620_dram_init()
614 soc_info->mem_size_min = MT7620_DDR2_SIZE_MIN; in mt7620_dram_init()
615 soc_info->mem_size_max = MT7620_DDR2_SIZE_MAX; in mt7620_dram_init()
623 mt7628_dram_init(struct ralink_soc_info *soc_info) in mt7628_dram_init() argument
628 soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN; in mt7628_dram_init()
629 soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX; in mt7628_dram_init()
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Drt3883.c116 void prom_soc_init(struct ralink_soc_info *soc_info) in prom_soc_init() argument
129 soc_info->compatible = "ralink,rt3883-soc"; in prom_soc_init()
135 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, in prom_soc_init()
141 soc_info->mem_base = RT3883_SDRAM_BASE; in prom_soc_init()
142 soc_info->mem_size_min = RT3883_MEM_SIZE_MIN; in prom_soc_init()
143 soc_info->mem_size_max = RT3883_MEM_SIZE_MAX; in prom_soc_init()
Dprom.c20 struct ralink_soc_info soc_info; variable
28 return soc_info.sys_type; in get_system_type()
63 prom_soc_init(&soc_info); in prom_init()
Dmt7621.c163 void prom_soc_init(struct ralink_soc_info *soc_info) in prom_soc_init() argument
198 soc_info->compatible = "mtk,mt7621-soc"; in prom_soc_init()
205 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, in prom_soc_init()
211 soc_info->mem_size_min = MT7621_DDR2_SIZE_MIN; in prom_soc_init()
212 soc_info->mem_size_max = MT7621_DDR2_SIZE_MAX; in prom_soc_init()
213 soc_info->mem_base = MT7621_DRAM_BASE; in prom_soc_init()
Dcommon.h21 extern struct ralink_soc_info soc_info;
30 extern void prom_soc_init(struct ralink_soc_info *soc_info);
/arch/arm/mach-davinci/include/mach/
Dcommon.h76 extern void davinci_common_init(const struct davinci_soc_info *soc_info);