/arch/alpha/lib/ |
D | ev67-strrchr.S | 37 insbl a1, 2, t5 # U : 0000000000ch0000 42 sll t5, 8, t3 # U : 00000000ch000000 46 or t5, t3, t3 # E : 00000000chch0000 53 lda t5, -1 # E : build garbage mask 56 mskqh t5, a0, t4 # E : Complete garbage mask 86 subq t4, 1, t5 # E : build a mask of the bytes up to... 87 or t4, t5, t4 # E : ... and including the null 102 lda t5, 0x3f($31) # E : 103 subq t5, t2, t5 # E : Normalize leading zero count 105 addq t6, t5, v0 # E : and add to quadword address
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D | strrchr.S | 24 sll a1, 8, t5 # e0 : replicate our test character 26 or t5, a1, a1 # e0 : 28 sll a1, 16, t5 # e0 : 30 or t5, a1, a1 # e0 : 32 sll a1, 32, t5 # e0 : 35 or t5, a1, a1 # .. e1 : character replication complete 58 subq t4, 1, t5 # e0 : build a mask of the bytes up to... 59 or t4, t5, t4 # e1 : ... and including the null
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D | strchr.S | 24 sll a1, 8, t5 # e0 : replicate the search character 26 or t5, a1, a1 # e0 : 28 sll a1, 16, t5 # e0 : 31 or t5, a1, a1 # .. e1 : 32 sll a1, 32, t5 # e0 : 34 or t5, a1, a1 # e0 :
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D | ev67-strchr.S | 34 insbl a1, 1, t5 # U : 000000000000ch00 38 or t5, t3, a1 # E : 000000000000chch 44 inswl a1, 2, t5 # E : 00000000chch0000 48 or a3, t5, t5 # E : 0000chchchch0000 53 or t5, a1, a1 # E : chchchchchchchch
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D | stxcpy.S | 239 and a1, 7, t5 # e0 : find src misalignment 256 cmplt t4, t5, t12 # e0 : 260 mskqh t2, t5, t2 # e0 : 275 and a1, 7, t5 # .. e1 : 278 srl t12, t5, t12 # e0 : adjust final null return value
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D | ev6-stxcpy.S | 269 and a1, 7, t5 # E : find src misalignment 287 cmplt t4, t5, t12 # E : 291 mskqh t2, t5, t2 # U : 304 and a1, 7, t5 # E : 308 srl t12, t5, t12 # U : adjust final null return value
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D | stxncpy.S | 296 and a1, 7, t5 # e0 : find src misalignment 312 1: cmplt t4, t5, t12 # e1 : 320 or t8, t10, t5 # .. e1 : test for end-of-count too 322 cmoveq a2, t5, t8 # .. e1 :
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/arch/mips/kernel/ |
D | scall32-o32.S | 51 lw t5, TI_ADDR_LIMIT($28) 53 and t5, t4 54 bltz t5, bad_stack # -> sp is bad 64 load_a4: user_lw(t5, 16(t0)) # argument #5 from usp 70 sw t5, 16(sp) # argument #5 to ksp 157 li t5, 0 196 lw t5, 24(sp) 199 sw t5, 20(sp)
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/arch/arm64/crypto/ |
D | crct10dif-ce-core.S | 85 t5 .req v19 137 ext t5.8b, ad.8b, ad.8b, #2 // A2 142 pmull t5.8h, t5.8b, fold_consts.8b // H = A2*B 151 tbl t5.16b, {ad.16b}, perm2.16b // A2 156 pmull2 t5.8h, t5.16b, fold_consts.16b // H = A2*B 163 eor t5.16b, t5.16b, t7.16b // M = G + H 166 uzp1 t8.2d, t4.2d, t5.2d 167 uzp2 t4.2d, t4.2d, t5.2d 184 zip2 t5.2d, t8.2d, t4.2d 190 ext t5.16b, t5.16b, t5.16b, #14 [all …]
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D | ghash-ce-core.S | 26 t5 .req v12 72 ext t5.8b, \ad\().8b, \ad\().8b, #2 // A2 80 tbl t5.16b, {\ad\().16b}, perm2.16b // A2 101 pmull\t t5.8h, t5.\nb, \bd // H = A2*B 109 eor t5.16b, t5.16b, t6.16b // M = G + H 112 uzp1 t4.2d, t3.2d, t5.2d 113 uzp2 t3.2d, t3.2d, t5.2d 130 zip2 t5.2d, t4.2d, t3.2d 136 ext t5.16b, t5.16b, t5.16b, #14 140 eor t3.16b, t3.16b, t5.16b
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/arch/x86/crypto/ |
D | glue_helper-asm-avx2.S | 56 t1x, t2, t2x, t3, t3x, t4, t5) \ argument 70 add2_le128(t2, t0, t4, t3, t5); /* ab: le2 ; cd: le3 */ \ 72 add2_le128(t2, t0, t4, t3, t5); \ 74 add2_le128(t2, t0, t4, t3, t5); \ 76 add2_le128(t2, t0, t4, t3, t5); \ 78 add2_le128(t2, t0, t4, t3, t5); \ 80 add2_le128(t2, t0, t4, t3, t5); \ 82 add2_le128(t2, t0, t4, t3, t5); \
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D | camellia-aesni-avx2-asm_64.S | 63 #define roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ argument 70 vbroadcasti128 .Lpre_tf_lo_s1, t5; \ 87 filter_8bit(x0, t5, t6, t7, t4); \ 88 filter_8bit(x7, t5, t6, t7, t4); \ 95 filter_8bit(x2, t5, t6, t7, t4); \ 96 filter_8bit(x5, t5, t6, t7, t4); \ 97 filter_8bit(x1, t5, t6, t7, t4); \ 98 filter_8bit(x4, t5, t6, t7, t4); \ 104 vextracti128 $1, x5, t5##_x; \ 125 vaesenclast t4##_x, t5##_x, t5##_x; \ [all …]
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/arch/riscv/kernel/ |
D | mcount.S | 94 ld t5, 0(t3) 95 bne t5, t4, do_trace 124 jalr t5
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D | mcount-dyn.S | 81 la t5, function_trace_op 82 ld a2, 0(t5) 214 la t5, function_trace_op 215 ld a2, 0(t5)
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/arch/ia64/lib/ |
D | copy_page.S | 45 t5[PIPE_DEPTH], t6[PIPE_DEPTH], t7[PIPE_DEPTH], t8[PIPE_DEPTH] 82 (p[0]) ld8 t5[0]=[src1],16 83 (EPI) st8 [tgt1]=t5[PIPE_DEPTH-1],16
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D | copy_page_mck.S | 81 #define t5 t1 // alias! macro 84 #define t9 t5 // alias! 153 (p[D]) ld8 t5 = [src0], 8 160 (p[D]) st8 [dst0] = t5, 8
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D | memcpy_mck.S | 49 #define t5 t1 // alias! macro 53 #define t9 t5 // alias! 233 EX(.ex_handler, (p[D]) ld8 t5 = [src0], 8) 240 EX(.ex_handler, (p[D]) st8 [dst0] = t5, 8) 439 EX(.ex_handler_short, (p6) ld1 t5=[src0],2) 444 EX(.ex_handler_short, (p6) st1 [dst0]=t5,2) 483 EK(.ex_handler_short, (p10) ld1 t5=[src0],2) 491 EK(.ex_handler_short, (p10) st1 [dst0] = t5,2)
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/arch/x86/include/asm/ |
D | syscall_wrapper.h | 19 #define SYSCALL_PT_ARG6(m, t1, t2, t3, t4, t5, t6) \ argument 20 SYSCALL_PT_ARG5(m, t1, t2, t3, t4, t5), m(t6, (regs->bp)) 21 #define SYSCALL_PT_ARG5(m, t1, t2, t3, t4, t5) \ argument 22 SYSCALL_PT_ARG4(m, t1, t2, t3, t4), m(t5, (regs->di))
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/arch/alpha/include/uapi/asm/ |
D | regdef.h | 12 #define t5 $6 macro
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/arch/riscv/include/uapi/asm/ |
D | ptrace.h | 50 unsigned long t5; member
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/arch/riscv/lib/ |
D | memcpy.S | 52 REG_L t5, 9*SZREG(a1) 62 REG_S t5, 9*SZREG(t6)
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/arch/mips/include/asm/ |
D | regdef.h | 36 #define t5 $13 macro
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/arch/riscv/include/asm/ |
D | ptrace.h | 45 unsigned long t5; member
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/arch/arm/crypto/ |
D | aes-neonbs-core.S | 302 t0, t1, t2, t3, t4, t5, t6, t7, inv 312 vext.8 \t5, \x5, \x5, #12 315 veor \x5, \x5, \t5 325 veor \t5, \t5, \x4 340 veor \x7, \t1, \t5 358 t0, t1, t2, t3, t4, t5, t6, t7 363 vld1.8 {\t4-\t5}, [bskey, :256]! 369 veor \x5, \x5, \t5 384 vext.8 \t5, \x5, \x5, #8 387 veor \t5, \t5, \x5 [all …]
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/arch/s390/include/asm/ |
D | stacktrace.h | 131 #define CALL_LARGS_5(t1, a1, t2, a2, t3, a3, t4, a4, t5, a5) \ argument 133 long arg5 = (long)(t5)(a5)
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