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Searched refs:t9 (Results 1 – 18 of 18) sorted by relevance

/arch/mips/kernel/
Dr2300_switch.S41 LONG_L t9, TASK_STACK_CANARY(a1)
42 LONG_S t9, 0(t8)
Dr4k_switch.S36 LONG_L t9, TASK_STACK_CANARY(a1)
37 LONG_S t9, 0(t8)
Dcps-vec.S174 move a1, t9
318 li t9, 0
327 mfc0 t9, CP0_GLOBALNUMBER
328 andi t9, t9, MIPS_GLOBALNUMBER_VP
347 mfc0 t9, $15, 1
348 and t9, t9, t1
353 mul v1, t9, t1
Dcps-vec-ns16550.S23 1: lw t0, UART_LSR_OFS(t9)
26 sb a0, UART_TX_OFS(t9)
162 li t9, CKSEG1ADDR(CONFIG_MIPS_CPS_NS16550_BASE)
Docteon_switch.S49 LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
54 LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
66 LONG_L t9, TASK_STACK_CANARY(a1)
67 LONG_S t9, 0(t8)
100 dmfc0 t9, $9,7 /* CvmCtl register. */
109 bbit1 t9, 28, 1f
117 1: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */
263 dmfc0 t9, $9,7 /* CvmCtl register. */
274 bbit1 t9, 28, 2f /* Skip LLM if CvmCtl[NODFA_CP2] is set */
284 bbit1 t9, 26, done_restore /* done if CvmCtl[NOCRYPTO] set */
Dpm-cps.c76 t8, t9, k0, k1, gp, sp, fp, ra, enumerator
/arch/mips/include/asm/
Dregdef.h51 #define t9 $25 macro
94 #define t9 $25 /* callee address for PIC/temp */ macro
/arch/ia64/lib/
Dcopy_page_mck.S84 #define t9 t5 // alias! macro
163 (p[D]) ld8 t9 = [src0], 3*8
170 (p[D]) st8 [dst0] = t9, 3*8
Dmemcpy_mck.S53 #define t9 t5 // alias! macro
243 EX(.ex_handler, (p[D]) ld8 t9 = [src0], 3*8)
250 EX(.ex_handler, (p[D]) st8 [dst0] = t9, 3*8)
/arch/alpha/include/uapi/asm/
Dregdef.h33 #define t9 $23 macro
/arch/alpha/lib/
Dstxcpy.S39 .frame sp, 0, t9
91 ret (t9) # .. e1 :
99 .frame sp, 0, t9
230 ret (t9) # .. e1 :
288 ret (t9) # e1 :
Dev6-stxcpy.S50 .frame sp, 0, t9
109 ret (t9) # L0 : Latency=3
119 .frame sp, 0, t9
259 ret (t9) # L0 : Latency=3
318 ret (t9) # e1 :
Dstxncpy.S47 .frame sp, 0, t9, 0
105 ret (t9) # e1 :
118 .frame sp, 0, t9, 0
266 ret (t9) # .. e1 :
344 ret (t9) # .. e1 :
Dev6-stxncpy.S58 .frame sp, 0, t9, 0
133 ret (t9) # L0 : Latency=3
150 .frame sp, 0, t9, 0
312 ret (t9) # L0 : Latency=3
393 ret (t9) # L0 : Latency=3
/arch/arm64/crypto/
Dghash-ce-core.S30 t9 .req v16
105 pmull\t t9.8h, \ad, \b4\().\nb // K = A*B4
114 uzp1 t6.2d, t7.2d, t9.2d
115 uzp2 t7.2d, t7.2d, t9.2d
132 zip2 t9.2d, t6.2d, t7.2d
138 ext t9.16b, t9.16b, t9.16b, #12
141 eor t7.16b, t7.16b, t9.16b
Dcrct10dif-ce-core.S89 t9 .req v23
145 pmull t9.8h, ad.8b, bd3.8b // I = A*B3
159 pmull2 t9.8h, ad.16b, bd3.16b // I = A*B3
164 eor t6.16b, t6.16b, t9.16b // N = I + J
/arch/mips/lib/
Dmemset.S103 move t9, a1
Dcsum_partial.S323 #define errptr t9