/arch/arm/boot/dts/ |
D | rda8810pl-orangepi-i96.dts | 30 uart_clk: uart-clk { label 39 clocks = <&uart_clk>; 44 clocks = <&uart_clk>; 49 clocks = <&uart_clk>;
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D | rda8810pl-orangepi-2g-iot.dts | 30 uart_clk: uart-clk { label 39 clocks = <&uart_clk>; 44 clocks = <&uart_clk>; 49 clocks = <&uart_clk>;
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D | mt6592.dtsi | 75 uart_clk: dummy26m { label 110 clocks = <&uart_clk>; 118 clocks = <&uart_clk>; 126 clocks = <&uart_clk>; 134 clocks = <&uart_clk>;
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D | mt6589.dtsi | 62 uart_clk: dummy26m { label 107 clocks = <&uart_clk>; 115 clocks = <&uart_clk>; 123 clocks = <&uart_clk>; 131 clocks = <&uart_clk>;
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D | nspire-cx.dts | 26 clocks = <&uart_clk>, <&apb_pclk>; 27 clock-names = "uart_clk", "apb_pclk"; 85 uart_clk: uart_clk { label
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D | mt8127.dtsi | 74 uart_clk: dummy26m { label 135 clocks = <&uart_clk>; 143 clocks = <&uart_clk>; 151 clocks = <&uart_clk>; 159 clocks = <&uart_clk>;
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D | mt6580.dtsi | 56 uart_clk: dummy26m { label 96 clocks = <&uart_clk>; 105 clocks = <&uart_clk>;
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D | artpec6.dtsi | 337 clock-names = "uart_clk", "apb_pclk"; 351 clock-names = "uart_clk", "apb_pclk"; 365 clock-names = "uart_clk", "apb_pclk"; 379 clock-names = "uart_clk", "apb_pclk";
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D | zynq-7000.dtsi | 162 clock-names = "uart_clk", "pclk"; 171 clock-names = "uart_clk", "pclk";
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/arch/arm64/boot/dts/mediatek/ |
D | mt6795.dtsi | 101 uart_clk: dummy26m { label 145 clocks = <&uart_clk>; 154 clocks = <&uart_clk>; 163 clocks = <&uart_clk>; 172 clocks = <&uart_clk>;
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D | mt6755.dtsi | 89 uart_clk: dummy26m { label 133 clocks = <&uart_clk>; 142 clocks = <&uart_clk>;
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/arch/mips/boot/dts/brcm/ |
D | bcm7125.dtsi | 39 uart_clk: uart_clk { label 125 clocks = <&uart_clk>; 137 clocks = <&uart_clk>; 149 clocks = <&uart_clk>;
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D | bcm7420.dtsi | 39 uart_clk: uart_clk { label 125 clocks = <&uart_clk>; 136 clocks = <&uart_clk>; 147 clocks = <&uart_clk>;
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D | bcm7358.dtsi | 33 uart_clk: uart_clk { label 136 clocks = <&uart_clk>; 148 clocks = <&uart_clk>; 160 clocks = <&uart_clk>;
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D | bcm7360.dtsi | 33 uart_clk: uart_clk { label 136 clocks = <&uart_clk>; 148 clocks = <&uart_clk>; 160 clocks = <&uart_clk>;
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D | bcm7362.dtsi | 39 uart_clk: uart_clk { label 142 clocks = <&uart_clk>; 154 clocks = <&uart_clk>; 166 clocks = <&uart_clk>;
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D | bcm7346.dtsi | 39 uart_clk: uart_clk { label 142 clocks = <&uart_clk>; 154 clocks = <&uart_clk>; 166 clocks = <&uart_clk>;
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D | bcm7435.dtsi | 51 uart_clk: uart_clk { label 158 clocks = <&uart_clk>; 169 clocks = <&uart_clk>; 180 clocks = <&uart_clk>;
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D | bcm7425.dtsi | 39 uart_clk: uart_clk { label 143 clocks = <&uart_clk>; 154 clocks = <&uart_clk>; 165 clocks = <&uart_clk>;
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/arch/arm64/boot/dts/bitmain/ |
D | bm1880-sophon-edge.dts | 52 uart_clk: uart-clk { label 176 clocks = <&uart_clk>; 183 clocks = <&uart_clk>; 190 clocks = <&uart_clk>;
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/arch/powerpc/boot/ |
D | 4xx.h | 24 void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk);
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D | 4xx.c | 723 void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk) in ibm405ex_fixup_clocks() argument 791 uart0 = uart1 = uart_clk; in ibm405ex_fixup_clocks()
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/arch/xtensa/boot/dts/ |
D | csp.dts | 50 clock-names = "uart_clk", "pclk";
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/arch/arm/mach-omap1/ |
D | clock.c | 527 struct uart_clk *uclk; in omap1_clk_enable_uart_functional_16xx() 532 uclk = (struct uart_clk *)clk; in omap1_clk_enable_uart_functional_16xx() 543 struct uart_clk *uclk; in omap1_clk_disable_uart_functional_16xx() 546 uclk = (struct uart_clk *)clk; in omap1_clk_disable_uart_functional_16xx()
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D | clock.h | 219 struct uart_clk { struct
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