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Searched refs:ul (Results 1 – 25 of 25) sorted by relevance

/arch/alpha/lib/
Dchecksum.c24 unsigned long ul; in from64to16() member
29 in_v.ul = x; in from64to16()
30 tmp_v.ul = (unsigned long) in_v.ui[0] + (unsigned long) in_v.ui[1]; in from64to16()
34 out_v.ul = (unsigned long) tmp_v.us[0] + (unsigned long) tmp_v.us[1] in from64to16()
Dcsum_partial_copy.c74 unsigned long ul; in from64to16() member
79 in_v.ul = x; in from64to16()
80 tmp_v.ul = (unsigned long) in_v.ui[0] + (unsigned long) in_v.ui[1]; in from64to16()
84 out_v.ul = (unsigned long) tmp_v.us[0] + (unsigned long) tmp_v.us[1] in from64to16()
/arch/mips/include/asm/
Dbitops.h531 if (!(word & (~0ul << 32))) { in __fls()
536 if (!(word & (~0ul << (BITS_PER_LONG-16)))) { in __fls()
540 if (!(word & (~0ul << (BITS_PER_LONG-8)))) { in __fls()
544 if (!(word & (~0ul << (BITS_PER_LONG-4)))) { in __fls()
548 if (!(word & (~0ul << (BITS_PER_LONG-2)))) { in __fls()
552 if (!(word & (~0ul << (BITS_PER_LONG-1)))) in __fls()
/arch/powerpc/include/asm/nohash/32/
Dslice.h13 #define SLICE_NUM_HIGH 0ul
/arch/arm64/include/asm/
Dvectors.h59 #define TRAMP_VALIAS 0ul
/arch/sh/include/mach-common/mach/
Dmicrodev.h24 #define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INT…
/arch/mips/kvm/
Dmmu.c206 unsigned long end = ~0ul; in kvm_mips_flush_gpa_pmd()
234 unsigned long end = ~0ul; in kvm_mips_flush_gpa_pud()
262 unsigned long end = ~0ul; in kvm_mips_flush_gpa_pgd()
336 unsigned long cur_end = ~0ul; \
359 unsigned long cur_end = ~0ul; \
382 unsigned long cur_end = ~0ul; \
864 unsigned long end = ~0ul; in kvm_mips_flush_gva_pmd()
892 unsigned long end = ~0ul; in kvm_mips_flush_gva_pud()
920 unsigned long end = ~0ul; in kvm_mips_flush_gva_pgd()
/arch/arm/mm/
Dmm.h90 #define arm_dma_pfn_limit (~0ul >> PAGE_SHIFT)
/arch/sh/boards/mach-microdev/
Dirq.c126 __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG); in init_microdev_irq()
/arch/powerpc/platforms/cell/
Dspu_priv1_mmio.c123 out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul); in tlb_invalidate()
Dspu_base.c318 spu_mfc_dsisr_set(spu, 0ul); in spu_irq_class_1()
/arch/powerpc/include/asm/book3s/64/
Dradix.h175 old_pte = radix__pte_update(mm, addr, ptep, ~0ul, 0, 0); in radix__ptep_get_and_clear_full()
/arch/powerpc/platforms/cell/spufs/
Dswitch.c116 spu_int_mask_set(spu, 0, 0ul); in disable_interrupts()
117 spu_int_mask_set(spu, 1, 0ul); in disable_interrupts()
118 spu_int_mask_set(spu, 2, 0ul); in disable_interrupts()
758 spu_int_mask_set(spu, 0, 0ul); in enable_interrupts()
760 spu_int_mask_set(spu, 2, 0ul); in enable_interrupts()
1407 spu_int_mask_set(spu, 0, 0ul); in clear_interrupts()
1408 spu_int_mask_set(spu, 1, 0ul); in clear_interrupts()
1409 spu_int_mask_set(spu, 2, 0ul); in clear_interrupts()
/arch/powerpc/include/asm/
Dspu.h681 #define SPU_ECC_CORRECTED_ERROR (1ull << 0ul)
691 #define SPU_ERR_ILLEGAL_INSTR (1ull << 0ul)
Dcputable.h553 #define CPU_FTRS_DT_CPU_BASE (~0ul)
/arch/x86/include/asm/xen/
Dpage.h115 unsigned long rval = ~0ul; in xen_safe_read_ulong()
/arch/sparc/kernel/
Diommu-common.c117 align_mask = ~0ul >> (BITS_PER_LONG - align_order); in iommu_tbl_range_alloc()
/arch/mips/kernel/
Dmodule.c210 se_bits = (offset & BIT(bits - 1)) ? ~0ul : 0; in apply_r_mips_pc()
Dcpu-probe.c919 write_c0_memorymapid(~0ul); in decode_config5()
/arch/powerpc/platforms/pseries/
Dpapr_scm.c18 #define BIND_ANY_ADDR (~0ul)
/arch/powerpc/lib/
Dsstep.c323 unsigned long ul; in read_mem_unaligned() member
329 u.ul = 0; in read_mem_unaligned()
333 *dest = u.ul; in read_mem_unaligned()
428 unsigned long ul; in write_mem_unaligned() member
433 u.ul = val; in write_mem_unaligned()
/arch/x86/xen/
Dsetup.c861 set_phys_range_identity(addr / PAGE_SIZE, ~0ul); in xen_memory_setup()
/arch/powerpc/platforms/powernv/
Dpci-ioda.c3434 idx, 0, 0ul, 0ul, 0ul); in pnv_pci_ioda1_unset_window()
/arch/x86/kernel/apic/
Dx2apic_uv_x.c64 return ~0ul; in uv_undefined()
/arch/mips/mm/
Dtlbex.c2580 write_c0_entrylo0(~0ul); in check_pabits()