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Searched refs:vp_id (Results 1 – 10 of 10) sorted by relevance

/arch/powerpc/include/asm/
Dxive.h115 extern int xive_native_configure_queue(u32 vp_id, struct xive_q *q, u8 prio,
117 extern void xive_native_disable_queue(u32 vp_id, struct xive_q *q, u8 prio);
122 extern int xive_native_enable_vp(u32 vp_id, bool single_escalation);
123 extern int xive_native_disable_vp(u32 vp_id);
124 extern int xive_native_get_vp_info(u32 vp_id, u32 *out_cam_id, u32 *out_chip_id);
127 extern int xive_native_get_queue_info(u32 vp_id, uint32_t prio,
134 extern int xive_native_get_queue_state(u32 vp_id, uint32_t prio, u32 *qtoggle,
136 extern int xive_native_set_queue_state(u32 vp_id, uint32_t prio, u32 qtoggle,
138 extern int xive_native_get_vp_state(u32 vp_id, u64 *out_state);
/arch/powerpc/sysdev/xive/
Dnative.c131 int xive_native_configure_queue(u32 vp_id, struct xive_q *q, u8 prio, in xive_native_configure_queue() argument
152 rc = opal_xive_get_queue_info(vp_id, prio, NULL, NULL, in xive_native_configure_queue()
174 rc = opal_xive_set_queue_info(vp_id, prio, qpage_phys, order, flags); in xive_native_configure_queue()
195 static void __xive_native_disable_queue(u32 vp_id, struct xive_q *q, u8 prio) in __xive_native_disable_queue() argument
201 rc = opal_xive_set_queue_info(vp_id, prio, 0, 0, 0); in __xive_native_disable_queue()
210 void xive_native_disable_queue(u32 vp_id, struct xive_q *q, u8 prio) in xive_native_disable_queue() argument
212 __xive_native_disable_queue(vp_id, q, prio); in xive_native_disable_queue()
703 int xive_native_enable_vp(u32 vp_id, bool single_escalation) in xive_native_enable_vp() argument
711 rc = opal_xive_set_vp_info(vp_id, flags, 0); in xive_native_enable_vp()
720 int xive_native_disable_vp(u32 vp_id) in xive_native_disable_vp() argument
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/arch/arm/mach-omap2/
Dprm.h148 u32 (*vp_check_txdone)(u8 vp_id);
149 void (*vp_clear_txdone)(u8 vp_id);
176 u32 omap_prm_vp_check_txdone(u8 vp_id);
177 void omap_prm_vp_clear_txdone(u8 vp_id);
Dvp.h31 u32 (*check_txdone)(u8 vp_id);
32 void (*clear_txdone)(u8 vp_id);
Dprm3xxx.c97 static u32 omap3_prm_vp_check_txdone(u8 vp_id) in omap3_prm_vp_check_txdone() argument
99 struct omap3_vp *vp = &omap3_vp[vp_id]; in omap3_prm_vp_check_txdone()
107 static void omap3_prm_vp_clear_txdone(u8 vp_id) in omap3_prm_vp_clear_txdone() argument
109 struct omap3_vp *vp = &omap3_vp[vp_id]; in omap3_prm_vp_clear_txdone()
Dprm_common.c555 u32 omap_prm_vp_check_txdone(u8 vp_id) in omap_prm_vp_check_txdone() argument
563 return prm_ll_data->vp_check_txdone(vp_id); in omap_prm_vp_check_txdone()
572 void omap_prm_vp_clear_txdone(u8 vp_id) in omap_prm_vp_clear_txdone() argument
580 prm_ll_data->vp_clear_txdone(vp_id); in omap_prm_vp_clear_txdone()
Dprm44xx.c147 static u32 omap4_prm_vp_check_txdone(u8 vp_id) in omap4_prm_vp_check_txdone() argument
149 struct omap4_vp *vp = &omap4_vp[vp_id]; in omap4_prm_vp_check_txdone()
158 static void omap4_prm_vp_clear_txdone(u8 vp_id) in omap4_prm_vp_clear_txdone() argument
160 struct omap4_vp *vp = &omap4_vp[vp_id]; in omap4_prm_vp_clear_txdone()
/arch/powerpc/kvm/
Dbook3s_xive_native.c46 xive_native_disable_queue(xc->vp_id, q, prio); in kvmppc_xive_native_cleanup_queue()
53 static int kvmppc_xive_native_configure_queue(u32 vp_id, struct xive_q *q, in kvmppc_xive_native_configure_queue() argument
60 rc = xive_native_configure_queue(vp_id, q, prio, qpage, order, in kvmppc_xive_native_configure_queue()
103 xive_native_disable_vp(xc->vp_id); in kvmppc_xive_native_cleanup_vcpu()
127 u32 vp_id; in kvmppc_xive_native_connect_vcpu() local
146 vp_id = kvmppc_xive_vp(xive, server_num); in kvmppc_xive_native_connect_vcpu()
147 if (kvmppc_xive_vp_in_use(xive->kvm, vp_id)) { in kvmppc_xive_native_connect_vcpu()
164 xc->vp_id = vp_id; in kvmppc_xive_native_connect_vcpu()
168 rc = xive_native_get_vp_info(xc->vp_id, &xc->vp_cam, &xc->vp_chip_id); in kvmppc_xive_native_connect_vcpu()
178 rc = xive_native_enable_vp(xc->vp_id, xive->single_escalation); in kvmppc_xive_native_connect_vcpu()
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Dbook3s_xive.h158 u32 vp_id; member
223 static inline bool kvmppc_xive_vp_in_use(struct kvm *kvm, u32 vp_id) in kvmppc_xive_vp_in_use() argument
229 if (vcpu->arch.xive_vcpu && vp_id == vcpu->arch.xive_vcpu->vp_id) in kvmppc_xive_vp_in_use()
Dbook3s_xive.c272 rc = xive_native_configure_queue(xc->vp_id, q, prio, qpage, in xive_provision_queue()
1184 xive_native_disable_vp(xc->vp_id); in kvmppc_xive_cleanup_vcpu()
1193 xive_native_disable_queue(xc->vp_id, q, i); in kvmppc_xive_cleanup_vcpu()
1220 u32 vp_id; in kvmppc_xive_connect_vcpu() local
1240 vp_id = kvmppc_xive_vp(xive, cpu); in kvmppc_xive_connect_vcpu()
1241 if (kvmppc_xive_vp_in_use(xive->kvm, vp_id)) { in kvmppc_xive_connect_vcpu()
1257 xc->vp_id = vp_id; in kvmppc_xive_connect_vcpu()
1261 r = xive_native_get_vp_info(xc->vp_id, &xc->vp_cam, &xc->vp_chip_id); in kvmppc_xive_connect_vcpu()
1286 r = xive_native_enable_vp(xc->vp_id, xive->single_escalation); in kvmppc_xive_connect_vcpu()
1315 r = xive_native_configure_queue(xc->vp_id, in kvmppc_xive_connect_vcpu()
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