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Searched refs:clk_i2s (Results 1 – 6 of 6) sorted by relevance

/sound/soc/pxa/
Dpxa2xx-i2s.c78 static struct clk *clk_i2s; variable
101 if (IS_ERR(clk_i2s)) in pxa2xx_i2s_startup()
102 return PTR_ERR(clk_i2s); in pxa2xx_i2s_startup()
162 if (WARN_ON(IS_ERR(clk_i2s))) in pxa2xx_i2s_hw_params()
164 clk_prepare_enable(clk_i2s); in pxa2xx_i2s_hw_params()
257 clk_disable_unprepare(clk_i2s); in pxa2xx_i2s_shutdown()
299 clk_i2s = clk_get(dai->dev, "I2SCLK"); in pxa2xx_i2s_probe()
300 if (IS_ERR(clk_i2s)) in pxa2xx_i2s_probe()
301 return PTR_ERR(clk_i2s); in pxa2xx_i2s_probe()
324 clk_put(clk_i2s); in pxa2xx_i2s_remove()
[all …]
/sound/soc/jz4740/
Djz4740-i2s.c102 struct clk *clk_i2s; member
136 ret = clk_prepare_enable(i2s->clk_i2s); in jz4740_i2s_startup()
160 clk_disable_unprepare(i2s->clk_i2s); in jz4740_i2s_shutdown()
260 div = clk_get_rate(i2s->clk_i2s) / (64 * params_rate(params)); in jz4740_i2s_hw_params()
314 clk_set_parent(i2s->clk_i2s, parent); in jz4740_i2s_set_sysclk()
320 clk_set_parent(i2s->clk_i2s, parent); in jz4740_i2s_set_sysclk()
321 ret = clk_set_rate(i2s->clk_i2s, freq); in jz4740_i2s_set_sysclk()
341 clk_disable_unprepare(i2s->clk_i2s); in jz4740_i2s_suspend()
360 ret = clk_prepare_enable(i2s->clk_i2s); in jz4740_i2s_resume()
525 i2s->clk_i2s = devm_clk_get(&pdev->dev, "i2s"); in jz4740_i2s_dev_probe()
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/sound/soc/tegra/
Dtegra20_i2s.c40 clk_disable_unprepare(i2s->clk_i2s); in tegra20_i2s_runtime_suspend()
50 ret = clk_prepare_enable(i2s->clk_i2s); in tegra20_i2s_runtime_resume()
152 ret = clk_set_rate(i2s->clk_i2s, i2sclock); in tegra20_i2s_hw_params()
342 i2s->clk_i2s = clk_get(&pdev->dev, NULL); in tegra20_i2s_platform_probe()
343 if (IS_ERR(i2s->clk_i2s)) { in tegra20_i2s_platform_probe()
345 ret = PTR_ERR(i2s->clk_i2s); in tegra20_i2s_platform_probe()
403 clk_put(i2s->clk_i2s); in tegra20_i2s_platform_probe()
419 clk_put(i2s->clk_i2s); in tegra20_i2s_platform_remove()
Dtegra30_i2s.c44 clk_disable_unprepare(i2s->clk_i2s); in tegra30_i2s_runtime_suspend()
54 ret = clk_prepare_enable(i2s->clk_i2s); in tegra30_i2s_runtime_resume()
157 ret = clk_set_rate(i2s->clk_i2s, i2sclock); in tegra30_i2s_hw_params()
401 i2s->clk_i2s = clk_get(&pdev->dev, NULL); in tegra30_i2s_platform_probe()
402 if (IS_ERR(i2s->clk_i2s)) { in tegra30_i2s_platform_probe()
404 ret = PTR_ERR(i2s->clk_i2s); in tegra30_i2s_platform_probe()
498 clk_put(i2s->clk_i2s); in tegra30_i2s_platform_probe()
520 clk_put(i2s->clk_i2s); in tegra30_i2s_platform_remove()
Dtegra20_i2s.h143 struct clk *clk_i2s; member
Dtegra30_i2s.h227 struct clk *clk_i2s; member