Home
last modified time | relevance | path

Searched refs:divisor (Results 1 – 6 of 6) sorted by relevance

/sound/soc/codecs/
Dtlv320aic26.c70 int fsref, divisor, wlen, pval, jval, dval, qval; in aic26_hw_params() local
79 case 8000: fsref = 48000; divisor = AIC26_DIV_6; break; in aic26_hw_params()
80 case 11025: fsref = 44100; divisor = AIC26_DIV_4; break; in aic26_hw_params()
81 case 12000: fsref = 48000; divisor = AIC26_DIV_4; break; in aic26_hw_params()
82 case 16000: fsref = 48000; divisor = AIC26_DIV_3; break; in aic26_hw_params()
83 case 22050: fsref = 44100; divisor = AIC26_DIV_2; break; in aic26_hw_params()
84 case 24000: fsref = 48000; divisor = AIC26_DIV_2; break; in aic26_hw_params()
85 case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break; in aic26_hw_params()
86 case 44100: fsref = 44100; divisor = AIC26_DIV_1; break; in aic26_hw_params()
87 case 48000: fsref = 48000; divisor = AIC26_DIV_1; break; in aic26_hw_params()
[all …]
Dtlv320aic32x4-clk.c312 u8 divisor; in clk_aic32x4_div_set_rate() local
314 divisor = DIV_ROUND_UP(parent_rate, rate); in clk_aic32x4_div_set_rate()
315 if (divisor > 128) in clk_aic32x4_div_set_rate()
319 AIC32X4_DIV_MASK, divisor); in clk_aic32x4_div_set_rate()
325 unsigned long divisor; in clk_aic32x4_div_round_rate() local
327 divisor = DIV_ROUND_UP(*parent_rate, rate); in clk_aic32x4_div_round_rate()
328 if (divisor > 128) in clk_aic32x4_div_round_rate()
331 return DIV_ROUND_UP(*parent_rate, divisor); in clk_aic32x4_div_round_rate()
/sound/drivers/
Dserial-u16550.c123 unsigned char divisor; member
382 if (uart->divisor != 0) { in snd_uart16550_do_open()
389 outb(uart->divisor in snd_uart16550_do_open()
489 if (uart->divisor != 0) { in snd_uart16550_do_close()
811 uart->divisor = base / speed; in snd_uart16550_create()
812 uart->speed = base / (unsigned int)uart->divisor; in snd_uart16550_create()
/sound/isa/cs423x/
Dcs4236_lib.c149 static unsigned char divisor_to_rate_register(unsigned int divisor) in divisor_to_rate_register() argument
151 switch (divisor) { in divisor_to_rate_register()
160 if (divisor < 21 || divisor > 192) { in divisor_to_rate_register()
164 return divisor; in divisor_to_rate_register()
/sound/x86/
Dintel_hdmi_audio.c732 u64 dividend, divisor; in had_prog_cts() local
740 divisor = 128 * aud_samp_freq; in had_prog_cts()
741 cts_val = div64_u64(dividend, divisor); in had_prog_cts()
/sound/sparc/
Ddbri.c1280 int divisor = 12288 / clockrate; in reset_chi() local
1282 if (divisor > 255 || divisor * clockrate != 12288) in reset_chi()
1286 *(cmd++) = DBRI_CMD(D_CHI, 0, D_CHI_CHICM(divisor) | D_CHI_FD in reset_chi()