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Searched refs:barrier (Results 1 – 25 of 33) sorted by relevance

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/tools/virtio/ringtest/
Dmain.h91 #define barrier() asm volatile("" ::: "memory") macro
97 #define cpu_relax() barrier()
110 barrier(); in busy_wait()
128 barrier(); \
134 barrier(); \
138 #define smp_wmb() barrier()
158 barrier(); \ in __read_once_size()
160 barrier(); \ in __read_once_size()
172 barrier(); in __write_once_size()
174 barrier(); in __write_once_size()
Dring.c132 barrier(); in add_inbuf()
/tools/virtio/asm/
Dbarrier.h3 #define barrier() asm volatile("" ::: "memory") macro
5 #define virt_rmb() barrier()
6 #define virt_wmb() barrier()
12 barrier(); \
19 #error Please fill in barrier macros
/tools/build/feature/
Dtest-pthread-barrier.c7 pthread_barrier_t barrier; in main() local
9 pthread_barrier_init(&barrier, NULL, 1); in main()
10 pthread_barrier_wait(&barrier); in main()
11 return pthread_barrier_destroy(&barrier); in main()
/tools/testing/selftests/bpf/progs/
Dloop5.c5 #define barrier() __asm__ __volatile__("": : :"memory") macro
21 barrier(); in while_true()
24 barrier(); in while_true()
27 barrier(); in while_true()
Dtest_pkt_access.c17 #define barrier() __asm__ __volatile__("": : :"memory") macro
54 barrier(); /* to force ordering of checks */ in process()
/tools/arch/x86/include/asm/
Dbarrier.h27 #define smp_rmb() barrier()
28 #define smp_wmb() barrier()
35 barrier(); \
42 barrier(); \
/tools/include/linux/
Dcompiler.h15 #define barrier() __asm__ __volatile__("": : :"memory") macro
113 barrier(); in __read_once_size()
115 barrier(); in __read_once_size()
127 barrier(); in __write_once_size()
129 barrier(); in __write_once_size()
/tools/arch/ia64/include/asm/
Dbarrier.h48 barrier(); \
55 barrier(); \
/tools/arch/s390/include/asm/
Dbarrier.h33 barrier(); \
40 barrier(); \
/tools/arch/sparc/include/asm/
Dbarrier_64.h45 barrier(); \
52 barrier(); \
/tools/memory-model/litmus-tests/
DLB+fencembonceonce+ctrlonceonce.litmus9 * combination of a control dependency and a full memory barrier are enough
10 * to do the trick. (But the full memory barrier could be replaced with
DWRC+pooncerelease+fencermbonceonce+Once.litmus8 * a release and a read memory barrier, it should be forbidden. More
DZ6.0+pooncerelease+poacquirerelease+fencembonceonce.litmus13 * full barrier for each non-rf link. (Exceptions include some cases
/tools/perf/bench/
Dfutex-wake-parallel.c55 static pthread_barrier_t barrier; variable
78 pthread_barrier_wait(&barrier); in waking_workerfn()
100 pthread_barrier_init(&barrier, NULL, nwaking_threads + 1); in wakeup_threads()
114 pthread_barrier_wait(&barrier); in wakeup_threads()
120 pthread_barrier_destroy(&barrier); in wakeup_threads()
/tools/arch/xtensa/include/asm/
Dbarrier.h15 #define rmb() barrier()
/tools/include/asm-generic/
Dbarrier.h28 #define mb() barrier()
/tools/testing/selftests/rcutorture/formal/srcu-cbmc/src/
Dbarriers.h5 #define barrier() __asm__ __volatile__("" : : : "memory") macro
/tools/perf/arch/x86/tests/
Drdpmc.c45 barrier(); in mmap_read_self()
62 barrier(); in mmap_read_self()
/tools/testing/selftests/powerpc/mm/
Dlarge_vm_fork_separation.c65 barrier(); in test()
/tools/memory-model/
Dlinux-kernel.bell27 'barrier (*barrier*) ||
Dlinux-kernel.def27 barrier() { __fence{barrier}; }
Dlinux-kernel.cat47 let barrier = fencerel(Barrier | Rmb | Wmb | Mb | Sync-rcu | Sync-srcu |
164 let mixed-accesses = ([Plain & W] ; (po-loc \ barrier) ; [Marked]) |
165 ([Marked] ; (po-loc \ barrier) ; [Plain & W])
/tools/testing/selftests/powerpc/include/
Dreg.h20 #define barrier() asm volatile("" : : : "memory"); macro
/tools/build/
DMakefile.feature61 pthread-barrier \

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