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Searched refs:APIC_LVT_MASKED (Results 1 – 9 of 9) sorted by relevance

/arch/x86/kernel/apic/
Dapic.c345 lvtt_value |= APIC_LVT_MASKED; in __setup_APIC_LVTT()
492 v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); in lapic_timer_shutdown()
1186 apic_write(APIC_LVTERR, v | APIC_LVT_MASKED); in clear_local_APIC()
1193 apic_write(APIC_LVTT, v | APIC_LVT_MASKED); in clear_local_APIC()
1195 apic_write(APIC_LVT0, v | APIC_LVT_MASKED); in clear_local_APIC()
1197 apic_write(APIC_LVT1, v | APIC_LVT_MASKED); in clear_local_APIC()
1200 apic_write(APIC_LVTPC, v | APIC_LVT_MASKED); in clear_local_APIC()
1207 apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); in clear_local_APIC()
1213 if (!(v & APIC_LVT_MASKED)) in clear_local_APIC()
1214 apic_write(APIC_LVTCMCI, v | APIC_LVT_MASKED); in clear_local_APIC()
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Dio_apic.c2013 apic_write(APIC_LVT0, v | APIC_LVT_MASKED); in mask_lapic_irq()
2021 apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); in unmask_lapic_irq()
2167 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); in check_timer()
2262 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); in check_timer()
/arch/x86/kernel/cpu/mce/
Dtherm_throt.c476 h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED; in intel_init_thermal()
517 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); in intel_init_thermal()
/arch/x86/kvm/
Dlapic.c108 (APIC_LVT_MASKED | APIC_SEND_PENDING | APIC_VECTOR_MASK)
298 return !(kvm_lapic_get_reg(apic, lvt_type) & APIC_LVT_MASKED); in apic_lvt_enabled()
323 return (lvt_val & (APIC_MODE_MASK | APIC_LVT_MASKED)) == APIC_DM_NMI; in apic_lvt_nmi_mode()
1909 lvt_val | APIC_LVT_MASKED); in kvm_lapic_reg_write()
1942 val |= APIC_LVT_MASKED; in kvm_lapic_reg_write()
1953 val |= APIC_LVT_MASKED; in kvm_lapic_reg_write()
2179 kvm_lapic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED); in kvm_lapic_reset()
2249 if (kvm_apic_hw_enabled(apic) && !(reg & APIC_LVT_MASKED)) { in kvm_apic_local_deliver()
2256 kvm_lapic_set_reg(apic, APIC_LVTPC, reg | APIC_LVT_MASKED); in kvm_apic_local_deliver()
2356 if ((lvt0 & APIC_LVT_MASKED) == 0 && in kvm_apic_accept_pic_intr()
/arch/x86/oprofile/
Dop_model_ppro.c145 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); in ppro_check_ctrs()
Dop_model_p4.c661 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); in p4_check_ctrs()
Dnmi_int.c385 apic_write(APIC_LVTERR, v | APIC_LVT_MASKED); in nmi_cpu_shutdown()
/arch/x86/include/asm/
Dapicdef.h107 #define APIC_LVT_MASKED (1 << 16) macro
/arch/x86/platform/uv/
Duv_nmi.c998 value &= ~APIC_LVT_MASKED; in uv_nmi_init()