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Searched refs:ldx (Results 1 – 25 of 56) sorted by relevance

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/arch/sparc/lib/
DNG4copy_page.S28 ldx [%o1 + 0x00], %o2
30 ldx [%o1 + 0x08], %o3
31 ldx [%o1 + 0x10], %o4
32 ldx [%o1 + 0x18], %o5
33 ldx [%o1 + 0x20], %g1
36 ldx [%o1 + 0x28], %g2
39 ldx [%o1 + 0x30], %g3
42 ldx [%o1 + 0x38], %o2
DGENpage.S13 1: ldx [%o1 + 0x00], %o2
14 ldx [%o1 + 0x08], %o3
15 ldx [%o1 + 0x10], %o4
16 ldx [%o1 + 0x18], %o5
21 ldx [%o1 + 0x20], %o2
22 ldx [%o1 + 0x28], %o3
23 ldx [%o1 + 0x30], %o4
24 ldx [%o1 + 0x38], %o5
DM7memcpy.S236 EX_LD(LOAD(ldx, %o1, %o4), memcpy_retl_o2_plus_63) ! load
239 EX_LD(LOAD(ldx, %o1+8, %o3), memcpy_retl_o2_plus_63_56) ! a block of 64
241 EX_LD(LOAD(ldx, %o1+16, %o4), memcpy_retl_o2_plus_63_48)
243 EX_LD(LOAD(ldx, %o1+24, %o3), memcpy_retl_o2_plus_63_40)
245 EX_LD(LOAD(ldx, %o1+32, %o4), memcpy_retl_o2_plus_63_32)! load and store
247 EX_LD(LOAD(ldx, %o1+40, %o3), memcpy_retl_o2_plus_63_24)! a block of 64
250 EX_LD(LOAD(ldx, %o1-16, %o4), memcpy_retl_o2_plus_63_16)
253 EX_LD(LOAD(ldx, %o1-8, %o3), memcpy_retl_o2_plus_63_8)
260 EX_LD(LOAD(ldx, %o1, %o4), memcpy_retl_o2_plus_31) ! load
263 EX_LD(LOAD(ldx, %o1+8, %o3), memcpy_retl_o2_plus_31_24) ! a block of 32
[all …]
DNG4memcpy.S160 1: EX_LD(LOAD(ldx, %o1 + 0x00, %g2), memcpy_retl_o2_plus_g1)
172 1: EX_LD(LOAD(ldx, %o1 + 0x00, %g1), memcpy_retl_o2_plus_o4)
174 EX_LD(LOAD(ldx, %o1 - 0x38, %g2), memcpy_retl_o2_plus_o4)
176 EX_LD(LOAD(ldx, %o1 - 0x30, %g3), memcpy_retl_o2_plus_o4_plus_64)
177 EX_LD(LOAD(ldx, %o1 - 0x28, GLOBAL_SPARE), memcpy_retl_o2_plus_o4_plus_64)
178 EX_LD(LOAD(ldx, %o1 - 0x20, %o5), memcpy_retl_o2_plus_o4_plus_64)
183 EX_LD(LOAD(ldx, %o1 - 0x18, %g2), memcpy_retl_o2_plus_o4_plus_48)
186 EX_LD(LOAD(ldx, %o1 - 0x10, %g3), memcpy_retl_o2_plus_o4_plus_40)
189 EX_LD(LOAD(ldx, %o1 - 0x08, GLOBAL_SPARE), memcpy_retl_o2_plus_o4_plus_32)
276 1: EX_LD(LOAD(ldx, %o1 + 0x00, %g1), memcpy_retl_o2_plus_o5)
[all …]
Dbitops.S22 1: ldx [%o1], %g7
44 1: ldx [%o1], %g7
66 1: ldx [%o1], %g7
88 1: ldx [%o1], %g7
108 1: ldx [%o1], %g7
128 1: ldx [%o1], %g7
Dmcount.S32 ldx [%g1 + %lo(ftrace_trace_function)], %g1
47 ldx [%g1 + %lo(ftrace_graph_return)], %g3
53 ldx [%g1 + %lo(ftrace_graph_entry)], %g1
Datomic_64.S90 1: ldx [%o1], %g1; \
105 1: ldx [%o1], %g1; \
120 1: ldx [%o1], %g1; \
155 1: ldx [%o0], %g1
/arch/sparc/kernel/
Drtrap_64.S85 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
96 rtrap_nmi: ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
115 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
162 ldx [%g6 + TI_FLAGS], %l0
185 rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
186 ldx [%sp + PTREGS_OFF + PT_V9_G2], %g2
188 ldx [%sp + PTREGS_OFF + PT_V9_G3], %g3
189 ldx [%sp + PTREGS_OFF + PT_V9_G4], %g4
190 ldx [%sp + PTREGS_OFF + PT_V9_G5], %g5
197 ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
[all …]
Dsyscalls.S56 1: ldx [%g6 + TI_FLAGS], %l5
109 ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0
111 ldx [%g6 + TI_FLAGS], %l0
112 ldx [%sp + PTREGS_OFF + PT_V9_G1], %l1
114 ldx [%sp + PTREGS_OFF + PT_V9_G2], %o0
155 ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
157 ldx [%sp + PTREGS_OFF + PT_V9_I0], %i0
159 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
160 ldx [%sp + PTREGS_OFF + PT_V9_I2], %i2
161 ldx [%sp + PTREGS_OFF + PT_V9_I3], %i3
[all …]
Dsun4v_tlb_miss.S12 ldx [BASE + HV_FAULT_I_ADDR_OFFSET], VADDR; \
13 ldx [BASE + HV_FAULT_I_CTX_OFFSET], CTX;
17 ldx [BASE + HV_FAULT_D_ADDR_OFFSET], VADDR; \
18 ldx [BASE + HV_FAULT_D_CTX_OFFSET], CTX;
81 ldx [%g6 + HV_FAULT_I_CTX_OFFSET], %o1 ! ctx
124 ldx [%g6 + HV_FAULT_D_CTX_OFFSET], %o1 ! ctx
142 ldx [%g5 + HV_FAULT_D_ADDR_OFFSET], %g5
196 ldx [%g2 + TRAP_PER_CPU_PGD_PADDR], %g7
208 ldx [%g6 + HV_FAULT_I_CTX_OFFSET], %o1
235 ldx [%g6 + HV_FAULT_D_CTX_OFFSET], %o1
[all …]
Dhvtramp.S53 ldx [%l0 + HVTRAMP_DESCR_FAULT_INFO_VA], %g2
60 1: ldx [%l3 + HVTRAMP_MAPPING_VADDR], %o0
62 ldx [%l3 + HVTRAMP_MAPPING_TTE], %o2
75 ldx [%l0 + HVTRAMP_DESCR_FAULT_INFO_PA], %o0
84 ldx [%l0 + HVTRAMP_DESCR_THREAD_REG], %l6
107 ldx [%g6 + TI_TASK], %g4
Dgetsetcc.S5 ldx [%o0 + PT_V9_TSTATE], %o1
15 ldx [%o0 + PT_V9_TSTATE], %o1
16 ldx [%o0 + PT_V9_G1], %o2
Dtrampoline_64.S131 ldx [%l4 + %lo(kern_locked_tte_data)], %l4
172 ldx [%g2 + 0x08], %o1
205 ldx [%g2 + 0x08], %o1
223 ldx [%l4 + %lo(kern_locked_tte_data)], %l4
311 ldx [%l0], %o0
315 ldx [%g3 + %lo(sparc64_kern_pri_context)], %g2
356 ldx [%g3 + %lo(kern_base)], %g3
370 ldx [%g2 + 0x08], %o1
387 ldx [%g2 + 0x08], %o1
394 ldx [%l0], %g6
[all …]
Dsun4v_ivec.S41 ldx [%g5], %g3
46 ldx [%g4 + TRAP_PER_CPU_CPU_MONDO_PA], %g7
94 ldx [%g4 + TRAP_PER_CPU_DEV_MONDO_PA], %g5
123 ldx [%g4 + %lo(ivector_table_pa)], %g4
127 1: ldx [%g1], %g2
152 ldx [%g3 + TRAP_PER_CPU_RESUM_MONDO_PA], %g5
155 ldx [%g3 + TRAP_PER_CPU_RESUM_KBUF_PA], %g7
263 ldx [%g3 + TRAP_PER_CPU_NONRESUM_MONDO_PA], %g5
266 ldx [%g3 + TRAP_PER_CPU_NONRESUM_KBUF_PA], %g7
Dutrap.S6 ldx [%g6 + TI_UTRAPS], %g1
19 ldx [%g1 + %g3], %g1
Divec.S26 ldx [%g2 + %lo(ivector_table_pa)], %g2
32 ldx [%g6], %g5
Dtsb.S59 661: ldx [%g7 + TRAP_PER_CPU_TSB_HUGE], %g5
103 ldx [%g7 + TRAP_PER_CPU_PGD_PADDR], %g7
142 ldx [%g7 + TRAP_PER_CPU_TSB_HUGE_TEMP], %g1
273 ldx [%g4 + HV_FAULT_D_ADDR_OFFSET], %g5
392 ldx [%o1 + TSB_CONFIG_REG_VAL], %o0
396 ldx [%o2 + TSB_CONFIG_REG_VAL], %g3
431 2: ldx [%o1 + TSB_CONFIG_MAP_VADDR], %o4
433 ldx [%o1 + TSB_CONFIG_MAP_PTE], %o5
447 ldx [%o2 + TSB_CONFIG_MAP_VADDR], %o4
448 ldx [%o2 + TSB_CONFIG_MAP_PTE], %o5
/arch/sparc/crypto/
Daes_asm.S915 ldx [%o0 + 0x00], %g1
918 ldx [%o0 + 0x08], %g2
919 1: ldx [%o1 + 0x00], %g3
920 ldx [%o1 + 0x08], %g7
921 ldx [%o1 + 0x10], %o4
922 ldx [%o1 + 0x18], %o5
942 10: ldx [%o1 + 0x00], %g3
943 ldx [%o1 + 0x08], %g7
958 ldx [%o0 + 0x00], %g1
961 ldx [%o0 + 0x08], %g2
[all …]
/arch/sh/lib64/
Dcopy_page.S71 ldx.q r2, r22, r63 ! prefetch 4 lines hence
78 ldx.q r2, r60, r36
79 ldx.q r2, r61, r37
80 ldx.q r2, r62, r38
81 ldx.q r2, r23, r39
Dcopy_user_memcpy.S171 ldx.q r22, r6, r0
182 ! ldx.q r22, r36, r63 ! TAKum03020
186 ldx.q r22, r19, r23
188 ldx.q r22, r20, r24
189 ldx.q r22, r21, r25
191 ldx.q r22, r6, r0
204 ldx.q r22, r6, r0
Dmemcpy.S156 ldx.q r22, r6, r0
167 ldx.q r22, r36, r63
170 ldx.q r22, r19, r23
172 ldx.q r22, r20, r24
173 ldx.q r22, r21, r25
175 ldx.q r22, r6, r0
188 ldx.q r22, r6, r0
/arch/sparc/include/asm/
Dttable.h178 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
204 ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \
205 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \
214 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
215 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
224 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
225 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
508 ldx [%sp + STACK_BIAS + 0x00], %l0; \
509 ldx [%sp + STACK_BIAS + 0x08], %l1; \
510 ldx [%sp + STACK_BIAS + 0x10], %l2; \
[all …]
Dtrap_block.h161 ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
171 ldx [DEST + TRAP_PER_CPU_THREAD], DEST;
188 ldx [REG2 + TRAP_PER_CPU_PER_CPU_BASE], DEST;
199 ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
208 ldx [DEST + TRAP_PER_CPU_THREAD], DEST;
/arch/sparc/prom/
Dcif.S18 ldx [%o1 + 0x0008], %l2 ! prom_cif_handler
37 ldx [%g6 + TI_TASK], %g4
40 ldx [%i1 + 0x000], %l2
/arch/powerpc/mm/nohash/
Dtlb_low_64e.S156 ldx r14,r14,r15 /* grab pgd entry */
159 ldx r14,r14,r15 /* grab pgd entry */
166 ldx r14,r14,r15 /* grab pud entry */
172 ldx r14,r14,r15 /* Grab pmd entry */
178 ldx r14,r14,r15 /* Grab PTE, normal (!huge) page */
404 ldx r14,r14,r15 /* grab pgd entry */
410 ldx r14,r14,r15 /* grab pud entry */
416 ldx r14,r14,r15 /* Grab pmd entry */
473 ldx r14,0,r14
831 ldx r15,r10,r15
[all …]

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