Lines Matching +full:pre +full:- +full:processing
25 virtual-->physical address translations obtained from the software
59 modifications for the address space 'vma->vm_mm' in the range
60 'start' to 'end-1' will be visible to the cpu. That is, after
62 virtual addresses in the range 'start' to 'end-1'.
78 address space is available via vma->vm_mm. Also, one may
79 test (vma->vm_flags & VM_EXEC) to see if this region is
81 split-tlb type setups).
84 page table modification for address space 'vma->vm_mm' for
87 'vma->vm_mm' for virtual address 'addr'.
89 This is used primarily during fault processing.
97 "vma->vm_mm", in the software page tables.
100 For example, it could use this event to pre-load TLB
105 is changing an existing virtual-->physical mapping to a new value,
122 a virtual-->physical translation to exist for a virtual address
129 indexed caches which must be flushed when virtual-->physical
163 entries in the cache for 'vma->vm_mm' for virtual addresses in
164 the range 'start' to 'end-1'.
180 address space is available via vma->vm_mm. Also, one may
181 test (vma->vm_flags & VM_EXEC) to see if this region is
191 'vma->vm_mm' for virtual address 'addr' which translates
194 This is used primarily during fault processing.
214 space for virtual addresses in the range 'start' to 'end-1'.
225 Is your port susceptible to virtual aliasing in its D-cache?
226 Well, if your D-cache is virtually indexed, is larger in size than
230 If your D-cache has this problem, first define asm/shmparam.h SHMLBA
232 addressed D-cache (or if the size is variable, the largest possible
242 Next, you have to solve the D-cache aliasing issue for all
247 physical page into its address space, by implication the D-cache
255 pages. It allows a port to efficiently avoid D-cache alias
269 If D-cache aliasing is not an issue, these two routines may
289 that dirty data in that page at the page->virtual mapping
291 D-cache aliasing, to make sure these kernel stores are
299 If D-cache aliasing is not an issue, this routine may
302 There is a bit set aside in page->flags (PG_arch_1) as
315 page->mapping->i_mmap is an empty tree, just mark the architecture