Lines Matching full:address

11   the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
16   within each bank to the CPU-viewed address. The needed setup includes the
17   base address, the size of each bank. Optionally, some timing parameters can
30   "#address-cells":
33       The second cell is the address offset within the bank.
41       Provide address translation from the System Bus to the parent bus.
44       The address region(s) that can be assigned for the System Bus is
48       The address translation is arbitrary as long as the banks are assigned in
49       the supported address space with the required alignment and they do not
68   - "#address-cells"
85         #address-cells = <2>;