Lines Matching +full:chip +full:- +full:select
2 -------------------------
5 SoCs. This interface provides external busses with a number of chip selects.
9 - compatible: must be "ti,c64x+emifa", "simple-bus"
10 - reg: register area base and size
11 - #address-cells: must be 2 (chip-select + offset)
12 - #size-cells: must be 1
13 - ranges: mapping from EMIFA space to parent space
18 - ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
20 - ti,emifa-burst-priority:
26 - ti,emifa-ce-config:
27 Configuration values for each of the supported chip selects.
32 compatible = "ti,c64x+emifa", "simple-bus";
33 #address-cells = <2>;
34 #size-cells = <1>;
41 ti,dscr-dev-enable = <13>;
42 ti,emifa-burst-priority = <255>;
43 ti,emifa-ce-config = <0x00240120
49 #address-cells = <1>;
50 #size-cells = <1>;
51 compatible = "cfi-flash";
53 bank-width = <1>;
54 device-width = <1>;
62 This shows a flash chip attached to chip select 3.