Lines Matching full:clock

1 NVIDIA Tegra124 and Tegra132 Clock And Reset Controller
3 This binding uses the common clock binding:
4 Documentation/devicetree/bindings/clock/clock-bindings.txt
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
12 - clocks : Should contain phandle and clock specifiers for two clocks:
14 - #clock-cells : Should be 1.
15   In clock consumers, this cell represents the clock ID exposed by the
17   <dt-bindings/clock/tegra124-car-common.h> (which covers IDs common
18   to Tegra124 and Tegra132) and <dt-bindings/clock/tegra124-car.h>
21   In clock consumers, this cell represents the bit number in the CAR's
33 EMC clock rate.
36 - clock-frequency : Should contain the memory clock rate to which this timing
38 - nvidia,parent-clock-frequency : Should contain the rate at which the current
39 parent of the EMC clock should be running at this timing.
40 - clocks : Must contain an entry for each entry in clock-names.
41   See ../clocks/clock-bindings.txt for details.
42 - clock-names : Must include the following entries:
43   - emc-parent : the clock that should be the parent of the EMC clock at this
49 	tegra_car: clock@60006000 {
52 		#clock-cells = <1>;
70 		osc: clock@0 {
71 			compatible = "fixed-clock";
73 			#clock-cells = <0>;
74 			clock-frequency = <112400000>;
77 		clk_32k: clock@1 {
78 			compatible = "fixed-clock";
80 			#clock-cells = <0>;
81 			clock-frequency = <32768>;
89 	clock@60006000 {
94 				clock-frequency = <12750000>;
95 				nvidia,parent-clock-frequency = <408000000>;
97 				clock-names = "emc-parent";
100 				clock-frequency = <20400000>;
101 				nvidia,parent-clock-frequency = <408000000>;
103 				clock-names = "emc-parent";