Lines Matching full:cpg
4 $id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#"
13 On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator)
18 - The CPG block generates various core clocks,
27 - renesas,r7s9210-cpg-mssr # RZ/A2
28 - renesas,r8a7742-cpg-mssr # RZ/G1H
29 - renesas,r8a7743-cpg-mssr # RZ/G1M
30 - renesas,r8a7744-cpg-mssr # RZ/G1N
31 - renesas,r8a7745-cpg-mssr # RZ/G1E
32 - renesas,r8a77470-cpg-mssr # RZ/G1C
33 - renesas,r8a774a1-cpg-mssr # RZ/G2M
34 - renesas,r8a774b1-cpg-mssr # RZ/G2N
35 - renesas,r8a774c0-cpg-mssr # RZ/G2E
36 - renesas,r8a774e1-cpg-mssr # RZ/G2H
37 - renesas,r8a7790-cpg-mssr # R-Car H2
38 - renesas,r8a7791-cpg-mssr # R-Car M2-W
39 - renesas,r8a7792-cpg-mssr # R-Car V2H
40 - renesas,r8a7793-cpg-mssr # R-Car M2-N
41 - renesas,r8a7794-cpg-mssr # R-Car E2
42 - renesas,r8a7795-cpg-mssr # R-Car H3
43 - renesas,r8a7796-cpg-mssr # R-Car M3-W
44 - renesas,r8a77961-cpg-mssr # R-Car M3-W+
45 - renesas,r8a77965-cpg-mssr # R-Car M3-N
46 - renesas,r8a77970-cpg-mssr # R-Car V3M
47 - renesas,r8a77980-cpg-mssr # R-Car V3H
48 - renesas,r8a77990-cpg-mssr # R-Car E3
49 - renesas,r8a77995-cpg-mssr # R-Car D3
50 - renesas,r8a779a0-cpg-mssr # R-Car V3U
70 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
72 <dt-bindings/clock/*-cpg-mssr.h>
79 SoC devices that are part of the CPG/MSSR Clock Domain and can be
80 power-managed through Module Standby should refer to the CPG device node
97 - renesas,r7s9210-cpg-mssr
114 cpg: clock-controller@e6150000 {
115 compatible = "renesas,r8a7795-cpg-mssr";