Lines Matching +full:reg +full:- +full:shift
3 Binding status: Unstable - ABI compatibility may be broken in the future
6 quite much similar to the basic gate-clock [2], however,
9 will be controlled instead and the corresponding hw-ops for
12 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
13 [2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt
17 - compatible : shall be one of:
18 "ti,gate-clock" - basic gate clock
19 "ti,wait-gate-clock" - gate clock which waits until clock is active before
21 "ti,dss-gate-clock" - gate clock with DSS specific hardware handling
22 "ti,am35xx-gate-clock" - gate clock with AM35xx specific hardware handling
23 "ti,clkdm-gate-clock" - clockdomain gate clock, which derives its functional
26 "ti,hsdiv-gate-clock" - gate clock with OMAP36xx specific hardware handling,
28 "ti,composite-gate-clock" - composite gate clock, to be part of composite
30 "ti,composite-no-wait-gate-clock" - composite gate clock that does not wait
33 - #clock-cells : from common clock binding; shall be set to 0
34 - clocks : link to phandle of parent clock
35 - reg : offset for register controlling adjustable gate, not needed for
36 ti,clkdm-gate-clock type
39 - ti,bit-shift : bit shift for programming the clock gate, invalid for
40 ti,clkdm-gate-clock type
41 - ti,set-bit-to-disable : inverts default gate programming. Setting the bit
46 #clock-cells = <0>;
47 compatible = "ti,gate-clock";
49 reg = <0x0a00>;
50 ti,bit-shift = <25>;
54 #clock-cells = <0>;
55 compatible = "ti,wait-gate-clock";
57 reg = <0x0a00>;
58 ti,bit-shift = <23>;
62 #clock-cells = <0>;
63 compatible = "ti,dss-gate-clock";
65 reg = <0x0e00>;
66 ti,bit-shift = <0>;
70 #clock-cells = <0>;
71 compatible = "ti,am35xx-gate-clock";
73 reg = <0x059c>;
74 ti,bit-shift = <1>;
78 #clock-cells = <0>;
79 compatible = "ti,clkdm-gate-clock";
84 #clock-cells = <0>;
85 compatible = "ti,hsdiv-gate-clock";
87 ti,bit-shift = <0x1b>;
88 reg = <0x0d00>;
89 ti,set-bit-to-disable;
93 #clock-cells = <0>;
94 compatible = "ti,composite-gate-clock";
96 ti,bit-shift = <3>;
97 reg = <0x0200>;
101 #clock-cells = <0>;
102 compatible = "ti,composite-no-wait-gate-clock";
104 ti,bit-shift = <15>;
105 reg = <0x0070>;