Lines Matching full:clock

1 Device Tree Clock bindings for arch-vt8500
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
9 	"via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
10 	"wm,wm8650-pll-clock" - for a WM8650 PLL clock
11 	"wm,wm8750-pll-clock" - for a WM8750 PLL clock
12 	"wm,wm8850-pll-clock" - for a WM8850 PLL clock
13 	"via,vt8500-device-clock" - for a VT/WM device clock
16 - reg : shall be the control register offset from PMC base for the pll clock.
17 - clocks : shall be the input parent clock phandle for the clock. This should
18 	be the reference clock.
19 - #clock-cells : from common clock binding; shall be set to 0.
22 - clocks : shall be the input parent clock phandle for the clock. This should
24 - #clock-cells : from common clock binding; shall be set to 0.
38 - enable-bit : shall be the bit within enable-reg to enable/disable the clock.
54 	#clock-cells = <0>;
55 	compatible = "fixed-clock";
56 	clock-frequency = <25000000>;
60 	#clock-cells = <0>;
61 	compatible = "wm,wm8650-pll-clock";
67 	#clock-cells = <0>;
68 	compatible = "via,vt8500-device-clock";