Lines Matching +full:panel +full:- +full:dpi

7 - compatible: must be one of:
11 - reg: base address and size of the control registers block
13 - interrupt-names: either the single entry "combined" representing a
18 - interrupts: contains an interrupt specifier for each entry in
19 	interrupt-names
21 - clock-names: should contain "clcdclk" and "apb_pclk"
23 - clocks: contains phandle and clock specifier pairs for the entries
24 	in the clock-names property. See
25 	Documentation/devicetree/bindings/clock/clock-bindings.txt
29 - memory-region: phandle to a node describing memory (see
30 	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
34 - max-memory-bandwidth: maximum bandwidth in bytes per second that the
38 Required sub-nodes:
40 - port: describes LCD panel signals, following the common binding
42 	Documentation/devicetree/bindings/media/video-interfaces.txt
48 	- arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
53 		pad used as B0, see also "LCD panel signal multiplexing
57 		- PL111 TFT 4:4:4 panel:
58 			arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
59 		- PL110 TFT (1:)5:5:5 panel:
60 			arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
61 		- PL111 TFT (1:)5:5:5 panel:
62 			arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
63 		- PL111 TFT 5:6:5 panel:
64 			arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
65 		- PL110 and PL111 TFT 8:8:8 panel:
66 			arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
67 		- PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
68 			arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
76 		interrupt-names = "combined";
79 		clock-names = "clcdclk", "apb_pclk";
80 		max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
84 				remote-endpoint = <&clcd_panel>;
90 	panel {
91 		compatible = "panel-dpi";
95 				remote-endpoint = <&clcd_pads>;
99 		panel-timing {
100 			clock-frequency = <25175000>;
102 			hback-porch = <40>;
103 			hfront-porch = <24>;
104 			hsync-len = <96>;
106 			vback-porch = <32>;
107 			vfront-porch = <11>;
108 			vsync-len = <2>;