Lines Matching +full:0 +full:x04
81 - reg: csi port number. Valid port numbers are 0 through 5.
95 port@0 with single child 'endpoint' node always a sink.
98 port@0 (required node)
100 - reg: 0
355 reg = <0x50000000 0x00024000>;
356 interrupts = <0 65 0x04 /* mpcore syncpt */
357 0 67 0x04>; /* mpcore general */
365 ranges = <0x54000000 0x54000000 0x04000000>;
369 reg = <0x54040000 0x00040000>;
370 interrupts = <0 68 0x04>;
378 reg = <0x0 0x54080000 0x0 0x700>;
389 ranges = <0x0 0x0 0x54080000 0x2000>;
393 #size-cells = <0>;
395 port@0 {
396 reg = <0>;
405 reg = <0x838 0x1300>;
427 #size-cells = <0>;
429 channel@0 {
430 reg = <0>;
431 nvidia,mipi-calibrate = <&mipi 0x001>;
435 #size-cells = <0>;
437 port@0 {
438 reg = <0>;
458 reg = <0x540c0000 0x00040000>;
459 interrupts = <0 70 0x04>;
467 reg = <0x54100000 0x00040000>;
468 interrupts = <0 71 0x04>;
476 reg = <0x54140000 0x00040000>;
477 interrupts = <0 72 0x04>;
485 reg = <0x54180000 0x00040000>;
493 reg = <0x54200000 0x00040000>;
494 interrupts = <0 73 0x04>;
508 reg = <0x54240000 0x00040000>;
509 interrupts = <0 74 0x04>;
523 reg = <0x54280000 0x00040000>;
524 interrupts = <0 75 0x04>;
535 reg = <0x542c0000 0x00040000>;
536 interrupts = <0 76 0x04>;
543 reg = <0x54300000 0x00040000>;