Lines Matching full:each

7   For Tegra186, one entry for each entry in reg-names:
18 - resets: Must contain an entry for each entry in reset-names.
23 The host1x top-level node defines a number of children, each representing one
34   - resets: Must contain an entry for each entry in reset-names.
48     - resets: Must contain an entry for each entry in reset-names.
56   vi can have optional ports node and max 6 ports are supported. Each port
77       Maximum 6 channels are supported with each csi brick as either x4 or x2
86       Each channel node must contain 2 port nodes which can be grouped
87       under 'ports' node and each port should have a single child 'endpoint'
124   - resets: Must contain an entry for each entry in reset-names.
137   - resets: Must contain an entry for each entry in reset-names.
150   - resets: Must contain an entry for each entry in reset-names.
160   - clocks: Must contain an entry for each entry in clock-names.
167   - resets: Must contain an entry for each entry in reset-names.
179   - clocks: Must contain an entry for each entry in clock-names.
185   - resets: Must contain an entry for each entry in reset-names.
193   Each display controller node has a child node, named "rgb", that represents
210   - clocks: Must contain an entry for each entry in clock-names.
216   - resets: Must contain an entry for each entry in reset-names.
241   - clocks: Must contain an entry for each entry in clock-names.
248   - resets: Must contain an entry for each entry in reset-names.
277   - clocks: Must contain an entry for each entry in clock-names.
292   - resets: Must contain an entry for each entry in reset-names.
305   - nvidia,xbar-cfg: 5 cells containing the crossbar configuration. Each lane
318   - clocks: Must contain an entry for each entry in clock-names.
323   - resets: Must contain an entry for each entry in reset-names.
339   - clocks: Must contain an entry for each entry in clock-names.
343   - resets: Must contain an entry for each entry in reset-names.