Lines Matching full:controller
1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
13 controller. Driver of DVC I2C controller is only compatible with
15 nvidia,tegra20-i2c: Tegra20 has 4 generic I2C controller. This can support
17 support master mode of I2C communication. Driver of I2C controller is
19 nvidia,tegra30-i2c: Tegra30 has 5 generic I2C controller. This controller is
20 very much similar to Tegra20 I2C controller with additional feature:
22 as per I2C core API transfer flags. Driver of I2C controller is
26 nvidia,tegra114-i2c: Tegra114 has 5 generic I2C controller. This controller is
27 very much similar to Tegra30 I2C controller with some hardware
29 - Tegra30/Tegra20 I2C controller has 2 clock source called div-clk and
31 hence clock mechanism is changed in I2C controller.
32 - Tegra30/Tegra20 I2C controller has enabled per packet transfer by
36 previous hardware driver. Hence, tegra114 I2C controller is compatible
38 nvidia,tegra210-i2c-vi: Tegra210 has one I2C controller that is on host1x bus
40 This VI I2C controller is mostly compatible with the programming model
43 apart (rather than 4) and the controller does not support slave mode.
44 - reg: Should contain I2C controller registers physical address and length.
45 - interrupts: Should contain I2C controller interrupts.