Lines Matching full:port

4 time. Active port input stream will be de-serialized and its content outputted
5 through PARALLEL output port.
6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
7 input port is a single lane 800Mbps. Both ports support clock and data lane
8 polarity swap. First port also supports data lane swap.
9 PARALLEL output port has a maximum width of 12 bits.
25   - ports: A ports node with one port child node per device input and output
26 	   port, in accordance with the video interface bindings defined in
28 	   port nodes are numbered as follows:
30 	   Port Description
32 	   0    CSI-2 first input port
33 	   1    CSI-2 second input port
37 - data-lanes: shall be <1> for Port 1. for Port 0 dual-lane operation shall be
38 <1 2> or <2 1>. For Port 0 single-lane operation shall be <1> or <2>.
63 		port@0 {
71 		port@2 {