Lines Matching +full:0 +full:xf

40   SDHC System Operation Control Register Bit[7:0].
61   Valid range = [0:0x1F].
62   ZNR is set as 0xF by default if this property is not provided.
67   Valid range = [0:0x1F].
68   ZPR is set as 0xF by default if this property is not provided.
74   Set as 0x4 by default if this property is not provided.
92   be set as 0x9 in driver.
109 		reg = <0xaa0000 0x1000>;
127 		reg = <0xab0000 0x1000>;
141 		reg = <0xaa0000 0x1000>,
142 		      <phy_addr 0x4>;
162 		reg = <0xab0000 0x1000>,
163 		      <phy_addr 0x4>;