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Lines Matching +full:hs +full:- +full:phy

7 clock and PHY.
11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
17 - clocks:
22 - clock-names:
27 - reg:
28 * For "marvell,armada-3700-sdhci", two register areas.
30 PHY PAD Voltage Control register.
31 Please follow the examples with compatible "marvell,armada-3700-sdhci"
33 Please also check property marvell,pad-type in below.
38 - marvell,xenon-sdhc-id:
44 - marvell,xenon-phy-type:
46 To select eMMC 5.1 PHY, set:
47 marvell,xenon-phy-type = "emmc 5.1 phy"
48 eMMC 5.1 PHY is the default choice if this property is not provided.
49 To select eMMC 5.0 PHY, set:
50 marvell,xenon-phy-type = "emmc 5.0 phy"
53 Please note that this property only presents the type of PHY.
55 For example, "emmc 5.1 phy" doesn't mean that this Xenon SDHC only
58 - marvell,xenon-phy-znr:
59 Set PHY ZNR value.
60 Only available for eMMC PHY.
64 - marvell,xenon-phy-zpr:
65 Set PHY ZPR value.
66 Only available for eMMC PHY.
70 - marvell,xenon-phy-nr-success-tun:
76 - marvell,xenon-phy-tun-step-divider:
80 - marvell,xenon-phy-slow-mode:
81 If this property is selected, transfers will bypass PHY.
84 always occur with PHY enabled in eMMC HS SDR, SD SDR12, SD SDR25,
85 SD Default Speed and HS mode and eMMC legacy speed mode.
87 - marvell,xenon-tun-count:
88 Xenon SDHC SoC usually doesn't provide re-tuning counter in
90 This property provides the re-tuning counter.
91 If this property is not set, default re-tuning counter will
94 - marvell,pad-type:
95 Type of Armada 3700 SoC PHY PAD Voltage Controller register.
96 Only valid when "marvell,armada-3700-sdhci" is selected.
97 Two types: "sd" and "fixed-1-8v".
98 If "sd" is selected, SoC PHY PAD is set as 3.3V at the beginning and is
100 If "fixed-1-8v" is selected, SoC PHY PAD is fixed 1.8V, such as for eMMC.
101 Please follow the examples with compatible "marvell,armada-3700-sdhci"
105 - For eMMC:
108 compatible = "marvell,armada-ap806-sdhci";
112 clock-names = "core", "axi";
113 bus-width = <4>;
114 marvell,xenon-phy-slow-mode;
115 marvell,xenon-tun-count = <11>;
116 non-removable;
117 no-sd;
118 no-sdio;
123 - For SD/SDIO:
126 compatible = "marvell,armada-cp110-sdhci";
129 vqmmc-supply = <&sd_vqmmc_regulator>;
130 vmmc-supply = <&sd_vmmc_regulator>;
132 clock-names = "core", "axi";
133 bus-width = <4>;
134 marvell,xenon-tun-count = <9>;
137 - For eMMC with compatible "marvell,armada-3700-sdhci":
140 compatible = "marvell,armada-3700-sdhci";
145 clock-names = "core";
146 bus-width = <8>;
147 mmc-ddr-1_8v;
148 mmc-hs400-1_8v;
149 non-removable;
150 no-sd;
151 no-sdio;
155 marvell,pad-type = "fixed-1-8v";
158 - For SD/SDIO with compatible "marvell,armada-3700-sdhci":
161 compatible = "marvell,armada-3700-sdhci";
165 vqmmc-supply = <&sd_regulator>;
168 clock-names = "core";
169 bus-width = <4>;
171 marvell,pad-type = "sd";