Lines Matching +full:0 +full:x2a

28 		FMan block. The offset is 0xc4 from the beginning of the
29 		Frame Processing Manager memory map (0xc3000 from the
44 		DEVDISR[1]			1		0
49 		DCFG_DEVDISR2[6]		1		0
56 		DCFG_CCSR_DEVDISR2[24]		1		0
148 muram@0 {
150 	ranges = <0 0x000000 0x28000>;
215 	cell-index = <0x28>;
217 	reg = <0xa8000 0x1000>;
221 	cell-index = <0x8>;
223 	reg = <0x88000 0x1000>;
227 	cell-index = <0x1>;
229 	reg = <0x81000 0x1000>;
338 	cell-index = <0x28>;
340 	reg = <0xa8000 0x1000>;
344 	cell-index = <0x8>;
346 	reg = <0x88000 0x1000>;
351 	reg = <0xfe000 0x1000>;
356 	cell-index = <0>;
357 	reg = <0xe0000 0x1000>;
431   PCS PHY addr must be '0'.
439 	reg = <0xf1000 0x1000>;
440 	interrupts = <101 2 0 0>;
447 	reg = <0xe3120 0xee0>;
451 		reg = <0x8>;
460 	reg = <0xf1000 0x1000>;
463 	pcsphy6: ethernet-phy@0 {
464 		reg = <0x0>;
476 	ranges = <0 0x400000 0x100000>;
477 	reg = <0x400000 0x100000>;
481 		96 2 0 0
483 	fsl,qman-channel-range = <0x40 0xc>;
485 	muram@0 {
487 		reg = <0x0 0x28000>;
493 		reg = <0x81000 0x1000>;
499 		reg = <0x82000 0x1000>;
505 		reg = <0x83000 0x1000>;
511 		reg = <0x84000 0x1000>;
517 		reg = <0x85000 0x1000>;
523 		reg = <0x86000 0x1000>;
527 		cell-index = <0x8>;
529 		reg = <0x88000 0x1000>;
533 		cell-index = <0x9>;
535 		reg = <0x89000 0x1000>;
539 		cell-index = <0xa>;
541 		reg = <0x8a000 0x1000>;
545 		cell-index = <0xb>;
547 		reg = <0x8b000 0x1000>;
551 		cell-index = <0xc>;
553 		reg = <0x8c000 0x1000>;
557 		cell-index = <0x10>;
559 		reg = <0x90000 0x1000>;
563 		cell-index = <0x28>;
565 		reg = <0xa8000 0x1000>;
569 		cell-index = <0x29>;
571 		reg = <0xa9000 0x1000>;
575 		cell-index = <0x2a>;
577 		reg = <0xaa000 0x1000>;
581 		cell-index = <0x2b>;
583 		reg = <0xab000 0x1000>;
587 		cell-index = <0x2c>;
589 		reg = <0xac000 0x1000>;
593 		cell-index = <0x30>;
595 		reg = <0xb0000 0x1000>;
600 		cell-index = <0>;
601 		reg = <0xe0000 0x1000>;
609 		reg = <0xe2000 0x1000>;
617 		reg = <0xe4000 0x1000>;
625 		reg = <0xe6000 0x1000>;
633 		reg = <0xf0000 0x1000>;
640 		reg = <0xf0000 0x1000>;
646 		reg = <0xfe000 0x1000>;
651 		reg = <0xf1000 0x1000>;
652 		interrupts = <101 2 0 0>;