Lines Matching full:phy
1 STMicroelectronics STM32 USB HS PHY controller
3 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
4 switch. It controls PHY configuration and status, and the UTMI+ switch that
5 selects either OTG or HOST controller for the second PHY port. It also sets
11 |_ PHY port#1 _________________ HOST controller
14 |_ PHY port#2 ----| |________________
19 Phy provider node
24 - reg: address and length of the usb phy control register set
25 - clocks: phandle + clock specifier for the PLL phy clock
30 - assigned-clocks: phandle + clock specifier for the PLL phy clock
31 - assigned-clock-parents: the PLL phy clock parent
36 Phy sub-nodes
40 - reg: phy port index
41 - phy-supply: phandle to the regulator providing 3V3 power to the PHY,
42 see phy-bindings.txt in the same directory.
43 - vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
44 - vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
45 - #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
46 port#1 and must be <1> for PHY port#2, to select USB controller
50 usbphyc: usb-phy@5a006000 {
58 usbphyc_port0: usb-phy@0 {
60 phy-supply = <&vdd_usb>;
63 #phy-cells = <0>;
66 usbphyc_port1: usb-phy@1 {
68 phy-supply = <&vdd_usb>;
71 #phy-cells = <1>;