Lines Matching +full:px30 +full:- +full:dsi +full:- +full:dphy

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,px30-dsi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip MIPI DPHY with additional LVDS/TTL modes
10   - Heiko Stuebner <heiko@sntech.de>
13   "#phy-cells":
18       - rockchip,px30-dsi-dphy
19       - rockchip,rk3128-dsi-dphy
20       - rockchip,rk3368-dsi-dphy
27       - description: PLL reference clock
28       - description: Module clock
30   clock-names:
32       - const: ref
33       - const: pclk
35   power-domains:
41       - description: exclusive PHY reset line
43   reset-names:
45       - const: apb
48   - "#phy-cells"
49   - compatible
50   - reg
51   - clocks
52   - clock-names
53   - resets
54   - reset-names
59   - |
61         compatible = "rockchip,px30-dsi-dphy";
64         clock-names = "ref", "pclk";
66         reset-names = "apb";
67         #phy-cells = <0>;