Lines Matching +full:fixed +full:- +full:clock

1 * Freescale QorIQ 1588 timer based PTP clock
5   - compatible   Should be "fsl,etsec-ptp" for eTSEC
6                  Should be "fsl,fman-ptp-timer" for DPAA FMan
7                  Should be "fsl,dpaa2-ptp" for DPAA2
8                  Should be "fsl,enetc-ptp" for ENETC
9   - reg          Offset and length of the register set for the device
10   - interrupts   There should be at least two interrupts. Some devices
13 Clock Properties:
15   - fsl,cksel        Timer reference clock source.
16   - fsl,tclk-period  Timer reference clock period in nanoseconds.
17   - fsl,tmr-prsc     Prescaler, divides the output clock.
18   - fsl,tmr-add      Frequency compensation value.
19   - fsl,tmr-fiper1   Fixed interval period pulse generator.
20   - fsl,tmr-fiper2   Fixed interval period pulse generator.
21   - fsl,tmr-fiper3   Fixed interval period pulse generator.
23   - fsl,max-adj      Maximum frequency adjustment in parts per billion.
24   - fsl,extts-fifo   The presence of this property indicates hardware
26   - little-endian    The presence of this property indicates the 1588 timer
27 		     IP block is little-endian mode. The default endian mode
28 		     is big-endian.
31   clock. You must choose these carefully for the clock to work right.
34   TimerOsc     = selected reference clock   MHz
35   tclk_period  = desired clock period       nanoseconds
43   tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
44   max_adj      = 1000000000 * (FreqDivRatio - 1.0) - 1
49   subsystem to synchronize the Linux clock.
51   Reference clock source is determined by the value, which is holded
54   according to reference manual, the next clock sources can be used:
57   <0> - external high precision timer reference clock (TSEC_TMR_CLK
59   <1> - eTSEC system clock;
60   <2> - eTSEC1 transmit clock;
61   <3> - RTC clock input.
64   <0> - external high precision timer reference clock (TMR_1588_CLK)
65   <1> - MAC system clock (1/2 FMan clock)
66   <2> - reserved
67   <3> - RTC clock oscillator
69   When this attribute is not used, the IEEE 1588 timer reference clock
70   will use the eTSEC system clock (for Gianfar) or the MAC system
71   clock (for DPAA).
76 		compatible = "fsl,etsec-ptp";
79 		interrupt-parent = < &ipic >;
81 		fsl,tclk-period = <10>;
82 		fsl,tmr-prsc    = <100>;
83 		fsl,tmr-add     = <0x999999A4>;
84 		fsl,tmr-fiper1  = <0x3B9AC9F6>;
85 		fsl,tmr-fiper2  = <0x00018696>;
86 		fsl,max-adj     = <659999998>;