Lines Matching +full:0 +full:x00100000
58 enum: [0, 1]
61 Should be either a value of 1 (LockStep mode) or 0 (Split mode),
82 either of them can be configured to appear at that R5F's address 0x0.
153 enum: [0, 1]
157 either a value of 1 (enabled) or 0 (disabled), default is disabled
162 enum: [0, 1]
166 either a value of 1 (enabled) or 0 (disabled), default is enabled if
171 enum: [0, 1]
174 address 0 (from core's view). Should be either a value of 1 (ATCM
175 at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted.
220 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
221 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>,
222 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>,
223 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>;
229 ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS */
230 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
231 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */
232 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>; /* MCU SRAM */
241 ranges = <0x41000000 0x00 0x41000000 0x20000>,
242 <0x41400000 0x00 0x41400000 0x20000>;
246 reg = <0x41000000 0x00008000>,
247 <0x41010000 0x00008000>;
251 ti,sci-proc-ids = <0x01 0xFF>;
265 reg = <0x41400000 0x00008000>,
266 <0x41410000 0x00008000>;
270 ti,sci-proc-ids = <0x02 0xFF>;