Lines Matching +full:0 +full:x800000
228 reg = <0x98000000 0x800000>;
237 ti,bootreg = <&scm_conf 0x304 0>;
243 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
244 resets = <&prm_tesla 0>, <&prm_tesla 1>;
261 reg = <0 0x95800000 0 0x3800000>;
273 reg = <0x55020000 0x10000>;
280 clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
298 reg = <0x0 0x99000000 0x0 0x4000000>;
310 reg = <0x40800000 0x48000>,
311 <0x40e00000 0x8000>,
312 <0x40f00000 0x8000>;
314 ti,bootreg = <&scm_conf 0x55c 0>;
320 resets = <&prm_dsp1 0>;
321 clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>;