Lines Matching +full:reg +full:- +full:shift
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/serial.yaml#
18 - items:
19 - enum:
20 - renesas,r9a06g032-uart
21 - renesas,r9a06g033-uart
22 - const: renesas,rzn1-uart
23 - items:
24 - enum:
25 - rockchip,px30-uart
26 - rockchip,rk3036-uart
27 - rockchip,rk3066-uart
28 - rockchip,rk3188-uart
29 - rockchip,rk3288-uart
30 - rockchip,rk3308-uart
31 - rockchip,rk3328-uart
32 - rockchip,rk3368-uart
33 - rockchip,rk3399-uart
34 - rockchip,rv1108-uart
35 - const: snps,dw-apb-uart
36 - items:
37 - enum:
38 - brcm,bcm11351-dw-apb-uart
39 - brcm,bcm21664-dw-apb-uart
40 - const: snps,dw-apb-uart
41 - const: snps,dw-apb-uart
43 reg:
49 clock-frequency: true
55 clock-names:
57 - const: baudclk
58 - const: apb_pclk
60 snps,uart-16550-compatible:
68 reg-shift: true
70 reg-io-width: true
72 dcd-override:
79 dsr-override:
86 cts-override:
93 ri-override:
100 - compatible
101 - reg
102 - interrupts
107 - |
109 compatible = "snps,dw-apb-uart";
110 reg = <0x80230000 0x100>;
111 clock-frequency = <3686400>;
113 reg-shift = <2>;
114 reg-io-width = <4>;
115 dcd-override;
116 dsr-override;
117 cts-override;
118 ri-override;
121 - |
124 compatible = "snps,dw-apb-uart";
125 reg = <0x80230000 0x100>;
128 reg-shift = <2>;
129 reg-io-width = <4>;
132 - |
135 compatible = "snps,dw-apb-uart";
136 reg = <0x80230000 0x100>;
138 clock-names = "baudclk", "apb_pclk";
140 reg-shift = <2>;
141 reg-io-width = <4>;