Lines Matching +full:r +full:- +full:car
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 - $ref: spi-controller.yaml#
18 - items:
19 - const: renesas,msiof-sh73a0 # SH-Mobile AG5
20 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible
22 - items:
23 - enum:
24 - renesas,msiof-r8a7742 # RZ/G1H
25 - renesas,msiof-r8a7743 # RZ/G1M
26 - renesas,msiof-r8a7744 # RZ/G1N
27 - renesas,msiof-r8a7745 # RZ/G1E
28 - renesas,msiof-r8a77470 # RZ/G1C
29 - renesas,msiof-r8a7790 # R-Car H2
30 - renesas,msiof-r8a7791 # R-Car M2-W
31 - renesas,msiof-r8a7792 # R-Car V2H
32 - renesas,msiof-r8a7793 # R-Car M2-N
33 - renesas,msiof-r8a7794 # R-Car E2
34 - const: renesas,rcar-gen2-msiof # generic R-Car Gen2 and RZ/G1
36 - items:
37 - enum:
38 - renesas,msiof-r8a774a1 # RZ/G2M
39 - renesas,msiof-r8a774b1 # RZ/G2N
40 - renesas,msiof-r8a774c0 # RZ/G2E
41 - renesas,msiof-r8a774e1 # RZ/G2H
42 - renesas,msiof-r8a7795 # R-Car H3
43 - renesas,msiof-r8a7796 # R-Car M3-W
44 - renesas,msiof-r8a77961 # R-Car M3-W+
45 - renesas,msiof-r8a77965 # R-Car M3-N
46 - renesas,msiof-r8a77970 # R-Car V3M
47 - renesas,msiof-r8a77980 # R-Car V3H
48 - renesas,msiof-r8a77990 # R-Car E3
49 - renesas,msiof-r8a77995 # R-Car D3
50 - const: renesas,rcar-gen3-msiof # generic R-Car Gen3 and RZ/G2
52 - items:
53 - const: renesas,sh-msiof # deprecated
59 - items:
60 - description: CPU and DMA engine registers
61 - items:
62 - description: CPU registers
63 - description: DMA engine registers
71 num-cs:
79 - Native chip selects are always deasserted in between transfers
80 that are part of the same message. Use cs-gpios to work around
82 - All slaves using native chip selects must use the same spi-cs-high
83 configuration. Use cs-gpios to work around this.
84 - When using GPIO chip selects, at least one native chip select must
94 dma-names:
104 - 0 # no bit delay
105 - 50 # 0.5-clock-cycle delay
106 - 100 # 1-clock-cycle delay
107 - 150 # 1.5-clock-cycle delay
108 - 200 # 2-clock-cycle delay
114 - 0 # no bit delay
115 - 50 # 0.5-clock-cycle delay
116 - 100 # 1-clock-cycle delay
117 - 150 # 1.5-clock-cycle delay
118 - 200 # 2-clock-cycle delay
119 - 300 # 3-clock-cycle delay
121 renesas,tx-fifo-size:
122 # deprecated for soctype-specific bindings
129 renesas,rx-fifo-size:
130 # deprecated for soctype-specific bindings
138 - compatible
139 - reg
140 - interrupts
141 - '#address-cells'
142 - '#size-cells'
147 - |
148 #include <dt-bindings/clock/r8a7791-clock.h>
149 #include <dt-bindings/interrupt-controller/irq.h>
152 compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";
157 dma-names = "tx", "rx";
158 #address-cells = <1>;
159 #size-cells = <0>;