Lines Matching full:slave
29 Slave. Both Master and Slave is using single port. ::
32 | Master +----------------------------------+ Slave |
41 Example 2: Stereo Stream with L and R channels is captured from Slave to
42 Master. Both Master and Slave is using single port. ::
46 | Master +----------------------------------+ Slave |
60 | Master +---------+------------------------+ Slave |
70 | +----------------------> | Slave |
81 L+R. Each Slave device processes the L + R data locally, typically
86 | Master +---------+------------------------+ Slave |
96 | +----------------------> | Slave |
105 Ports of the Master and is received by only single Port of the Slave
121 | | 2 || R Channel | Slave |
134 | Master +----------------------------------+ Slave |
143 | Master +----------------------------------+ Slave |
152 Masters, each rendering both channels. Each Slave receives L + R. This
157 | Master +----------------------------------+ Slave |
166 | Master +----------------------------------+ Slave |
175 2 channels. Each Slave receives 2 channels. ::
178 | Master +----------------------------------+ Slave |
187 | Master +----------------------------------+ Slave |
201 Note2: A Slave device may be configured to receive all channels
203 of the data (Example 3). The configuration of the Slave device is not
207 same slots would be used by all Devices, while for Example 3 the Slave
208 Device1 would use e.g. Slot 0 and Slave device2 slot 1.
268 Slave(s) as part of stream state transitions.
282 such as stream type (PCM/PDM) and parameters, Master and Slave
309 and Slave(s) runtime information associated with current stream.
311 (2) All the Master(s) and Slave(s) associated with current stream provide
313 Master(s) and Slave(s) for current stream and their channel mask.
319 the respective Master(s) and Slave(s) associated with stream. These APIs can
320 only be invoked once by respective Master(s) and Slave(s). From ASoC DPCM
330 int sdw_stream_add_slave(struct sdw_slave * slave,
349 (2) Transport and port parameters of all Master(s) and Slave(s) port(s) are
354 Slave(s) registers. The banked registers programming is done on the
362 (5) Ports of Master(s) and Slave(s) for current stream are prepared by
389 (2) All the Master(s) and Slave(s) port(s) for the current stream are
414 (1) All the Master(s) and Slave(s) port(s) for the current stream are
451 (1) All the port(s) of Master(s) and Slave(s) for current stream are
484 (1) Release port resources for all Master(s) and Slave(s) port(s)
487 (2) Release Master(s) and Slave(s) runtime resources associated with
496 all the Master(s) and Slave(s) associated with stream. From ASoC DPCM
503 int sdw_stream_remove_slave(struct sdw_slave * slave,