Lines Matching full:a

14 A, NA (1 bit)   Acknowledge (ACK) and Not Acknowledge (NACK) bit
16                 get a 10 bit I2C address.
17 Comm  (8 bits)  Command byte, a data byte which often selects a register on
19 Data  (8 bits)  A plain data byte. Sometimes, I write DataLow, DataHigh
21 Count (8 bits)  A data byte containing the length of a block operation.
33   S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
41   S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
49 They are just like the above transactions, but instead of a stop
50 condition P a start condition S is sent and the transaction continues.
51 An example of a byte read, followed by a byte write::
53   S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
65     client. Setting this flag treats any [NA] as [A], and all of
70     In a read message, master A/NA bit is skipped.
73     In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
77       S Addr Rd [A] [Data] NA Data [A] P
85     system memory into something that appears as a single transfer to the
90     This toggles the Rd/Wr flag. That is, if you want to do a write, but
91     need to emit an Rd instead of a Wr, or vice versa, you set this
94       S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
97     Force a stop condition (P) after the message. Some I2C related protocols