Lines Matching full:cpus

29 queues to distribute processing among CPUs. The NIC distributes packets by
32 queue, which in turn can be processed by separate CPUs. This mechanism is
61 one for each memory domain, where a memory domain is a set of CPUs that
83 to spread receive interrupts between CPUs. To manually adjust the IRQ
93 interrupt processing forms a bottleneck. Spreading load between CPUs
95 is to allocate as many queues as there are CPUs in the system (or the
140 Each receive hardware queue has an associated list of CPUs to which
145 the end of the bottom half routine, IPIs are sent to any CPUs for which
156 explicitly configured. The list of CPUs to which RPS may forward traffic
161 This file implements a bitmap of CPUs. RPS is disabled when it is zero
163 CPU. Documentation/core-api/irq/irq-affinity.rst explains how CPUs are assigned to
171 the rps_cpus to the CPUs in the same memory domain of the interrupting
172 CPU. If NUMA locality is not an issue, this could also be all CPUs in
178 and unnecessary. If there are fewer hardware queues than CPUs, then
186 RPS scales kernel receive processing across CPUs without introducing
223 be much larger than the number of CPUs, flow limit has finer-grained
238 In such environments, enable the feature on all CPUs that handle
261 flows to the CPUs where those flows are being processed. The flow hash
266 same CPU. Indeed, with many flows and few CPUs, it is very likely that
404 1. XPS using CPUs map
407 exclusively to a subset of CPUs, where the transmit completions for
410 significantly reduced since fewer CPUs contend for the same queue
425 threads are not pinned to CPUs and each thread handles packets
437 CPUs/receive-queues that may use that queue to transmit. The reverse
438 mapping, from CPUs to transmit queues or from receive-queues to transmit
469 how, XPS is configured at device init. The mapping of CPUs/receive-queues
472 For selection based on CPUs map::
487 If there are as many queues as there are CPUs in the system, then each
489 experience no contention. If there are fewer queues than CPUs, then the
490 best CPUs to share a given queue are probably those that share the cache
497 queue is selected based on the CPUs map.