Lines Matching +full:0 +full:x22
69 2) The CERCR.CIR bit is set to 0 or 1, depending on whether the firmware
98 | 0 | Ethernet | 0xF8 | 4 bytes |
101 | 4 | ATM | 0xF8 | 4 bytes |
104 | 8 | PPP | 0xF8 | 4 bytes |
107 | 12 | Ethernet RX | 0x22 | 1 byte |
110 | 16 | ATM Globtal | 0x28 | 1 byte |
113 | 20 | Insert Frame | 0xF8 | 4 bytes |
127 | 0 | General | Indicates that prior to each host command |
130 | | | CECDR = 0x00800000. |
131 | | | CECR = 0x01c1000f. |
140 | | | CECDR = 0x00800000. |
141 | | | CECR = 0x01c1000f. |
147 | | | CECDR = 0xce000003. |
148 | | | CECR = 0x01c10f58. |
159 | | | CECDR = 0x00800003. |
160 | | | CECR = 0x7'b{0}, 8'b{Enet TX thread SNUM}, |
161 | | | 1'b{1}, 12'b{0}, 4'b{1} |
216 Although it is not recommended, you can specify '0' in the soc.model
227 soc.minor = 0
249 for each of the 16 traps. If trap[i] is 0, then this particular
267 version numbers, respectively, of the microcode. If all values are 0,
282 u32 crc = 0;
286 for (i = 0; i < 8; i++)
287 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);