Lines Matching refs:pcci_info_1
189 pal_cache_config_info_1_t pcci_info_1; member
194 #define pcci_ld_hints pcci_info_1.pcci1_bits.load_hints
195 #define pcci_st_hints pcci_info_1.pcci1_bits.store_hints
196 #define pcci_ld_latency pcci_info_1.pcci1_bits.load_latency
197 #define pcci_st_latency pcci_info_1.pcci1_bits.store_latency
198 #define pcci_stride pcci_info_1.pcci1_bits.stride
199 #define pcci_line_size pcci_info_1.pcci1_bits.line_size
200 #define pcci_assoc pcci_info_1.pcci1_bits.associativity
201 #define pcci_cache_attr pcci_info_1.pcci1_bits.at
202 #define pcci_unified pcci_info_1.pcci1_bits.u
916 conf->pcci_info_1.pcci1_data = iprv.v0; in ia64_pal_cache_config_info()