Lines Matching refs:GCR_ACCESSOR_RW
118 #define GCR_ACCESSOR_RW(sz, off, name) \ macro
139 GCR_ACCESSOR_RW(64, 0x008, base)
148 GCR_ACCESSOR_RW(32, 0x020, access)
166 GCR_ACCESSOR_RW(32, 0x038, err_control)
171 GCR_ACCESSOR_RW(64, 0x040, error_mask)
174 GCR_ACCESSOR_RW(64, 0x048, error_cause)
180 GCR_ACCESSOR_RW(64, 0x050, error_addr)
183 GCR_ACCESSOR_RW(64, 0x058, error_mult)
187 GCR_ACCESSOR_RW(64, 0x070, l2_only_sync_base)
192 GCR_ACCESSOR_RW(64, 0x080, gic_base)
197 GCR_ACCESSOR_RW(64, 0x088, cpc_base)
202 GCR_ACCESSOR_RW(64, 0x090, reg0_base)
203 GCR_ACCESSOR_RW(64, 0x0a0, reg1_base)
204 GCR_ACCESSOR_RW(64, 0x0b0, reg2_base)
205 GCR_ACCESSOR_RW(64, 0x0c0, reg3_base)
209 GCR_ACCESSOR_RW(64, 0x098, reg0_mask)
210 GCR_ACCESSOR_RW(64, 0x0a8, reg1_mask)
211 GCR_ACCESSOR_RW(64, 0x0b8, reg2_mask)
212 GCR_ACCESSOR_RW(64, 0x0c8, reg3_mask)
232 GCR_ACCESSOR_RW(32, 0x130, l2_config)
243 GCR_ACCESSOR_RW(32, 0x300, l2_pft_control)
249 GCR_ACCESSOR_RW(32, 0x308, l2_pft_control_b)
254 GCR_ACCESSOR_RW(32, 0x620, l2sm_cop)
276 GCR_ACCESSOR_RW(64, 0x628, l2sm_tag_addr_cop)
281 GCR_ACCESSOR_RW(64, 0x680, bev_base)