Lines Matching refs:edev
238 struct eeh_dev *edev, *tmp; in eeh_pe_dev_traverse() local
248 eeh_pe_for_each_dev(pe, edev, tmp) in eeh_pe_dev_traverse()
249 fn(edev, flag); in eeh_pe_dev_traverse()
306 int eeh_pe_tree_insert(struct eeh_dev *edev, struct eeh_pe *new_pe_parent) in eeh_pe_tree_insert() argument
308 struct pci_controller *hose = edev->controller; in eeh_pe_tree_insert()
317 pe = eeh_pe_get(hose, edev->pe_config_addr); in eeh_pe_tree_insert()
320 list_add_tail(&edev->entry, &pe->edevs); in eeh_pe_tree_insert()
321 edev->pe = pe; in eeh_pe_tree_insert()
334 eeh_edev_dbg(edev, "Added to existing PE (parent: PE#%x)\n", in eeh_pe_tree_insert()
339 edev->pe = pe; in eeh_pe_tree_insert()
342 list_add_tail(&edev->entry, &pe->edevs); in eeh_pe_tree_insert()
343 eeh_edev_dbg(edev, "Added to bus PE\n"); in eeh_pe_tree_insert()
349 if (edev->physfn) in eeh_pe_tree_insert()
358 pe->addr = edev->pe_config_addr; in eeh_pe_tree_insert()
371 edev->pe = NULL; in eeh_pe_tree_insert()
385 list_add_tail(&edev->entry, &pe->edevs); in eeh_pe_tree_insert()
386 edev->pe = pe; in eeh_pe_tree_insert()
387 eeh_edev_dbg(edev, "Added to new (parent: PE#%x)\n", in eeh_pe_tree_insert()
402 int eeh_pe_tree_remove(struct eeh_dev *edev) in eeh_pe_tree_remove() argument
408 pe = eeh_dev_to_pe(edev); in eeh_pe_tree_remove()
410 eeh_edev_dbg(edev, "No PE found for device.\n"); in eeh_pe_tree_remove()
415 edev->pe = NULL; in eeh_pe_tree_remove()
416 list_del(&edev->entry); in eeh_pe_tree_remove()
536 struct eeh_dev *edev; in eeh_pe_mark_isolated() local
541 list_for_each_entry(edev, &pe->edevs, entry) { in eeh_pe_mark_isolated()
542 pdev = eeh_dev_to_pci_dev(edev); in eeh_pe_mark_isolated()
553 static void __eeh_pe_dev_mode_mark(struct eeh_dev *edev, void *flag) in __eeh_pe_dev_mode_mark() argument
557 edev->mode |= mode; in __eeh_pe_dev_mode_mark()
584 struct eeh_dev *edev, *tmp; in eeh_pe_state_clear() local
606 eeh_pe_for_each_dev(pe, edev, tmp) { in eeh_pe_state_clear()
607 pdev = eeh_dev_to_pci_dev(edev); in eeh_pe_state_clear()
631 static void eeh_bridge_check_link(struct eeh_dev *edev) in eeh_bridge_check_link() argument
641 if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT))) in eeh_bridge_check_link()
644 eeh_edev_dbg(edev, "Checking PCIe link...\n"); in eeh_bridge_check_link()
647 cap = edev->pcie_cap; in eeh_bridge_check_link()
648 eeh_ops->read_config(edev, cap + PCI_EXP_SLTSTA, 2, &val); in eeh_bridge_check_link()
650 eeh_edev_dbg(edev, "No card in the slot (0x%04x) !\n", val); in eeh_bridge_check_link()
655 eeh_ops->read_config(edev, cap + PCI_EXP_SLTCAP, 2, &val); in eeh_bridge_check_link()
657 eeh_ops->read_config(edev, cap + PCI_EXP_SLTCTL, 2, &val); in eeh_bridge_check_link()
659 eeh_edev_dbg(edev, "In power-off state, power it on ...\n"); in eeh_bridge_check_link()
662 eeh_ops->write_config(edev, cap + PCI_EXP_SLTCTL, 2, val); in eeh_bridge_check_link()
668 eeh_ops->read_config(edev, cap + PCI_EXP_LNKCTL, 2, &val); in eeh_bridge_check_link()
670 eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val); in eeh_bridge_check_link()
673 eeh_ops->read_config(edev, cap + PCI_EXP_LNKCAP, 4, &val); in eeh_bridge_check_link()
675 eeh_edev_dbg(edev, "No link reporting capability (0x%08x) \n", val); in eeh_bridge_check_link()
686 eeh_ops->read_config(edev, cap + PCI_EXP_LNKSTA, 2, &val); in eeh_bridge_check_link()
692 eeh_edev_dbg(edev, "Link up (%s)\n", in eeh_bridge_check_link()
695 eeh_edev_dbg(edev, "Link not ready (0x%04x)\n", val); in eeh_bridge_check_link()
699 #define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
701 static void eeh_restore_bridge_bars(struct eeh_dev *edev) in eeh_restore_bridge_bars() argument
710 eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]); in eeh_restore_bridge_bars()
712 eeh_ops->write_config(edev, 14*4, 4, edev->config_space[14]); in eeh_restore_bridge_bars()
715 eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_bridge_bars()
717 eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1, in eeh_restore_bridge_bars()
720 eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]); in eeh_restore_bridge_bars()
723 eeh_ops->write_config(edev, PCI_COMMAND, 4, edev->config_space[1] | in eeh_restore_bridge_bars()
727 eeh_bridge_check_link(edev); in eeh_restore_bridge_bars()
730 static void eeh_restore_device_bars(struct eeh_dev *edev) in eeh_restore_device_bars() argument
736 eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]); in eeh_restore_device_bars()
738 eeh_ops->write_config(edev, 12*4, 4, edev->config_space[12]); in eeh_restore_device_bars()
740 eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_device_bars()
742 eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1, in eeh_restore_device_bars()
746 eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]); in eeh_restore_device_bars()
752 eeh_ops->read_config(edev, PCI_COMMAND, 4, &cmd); in eeh_restore_device_bars()
753 if (edev->config_space[1] & PCI_COMMAND_PARITY) in eeh_restore_device_bars()
757 if (edev->config_space[1] & PCI_COMMAND_SERR) in eeh_restore_device_bars()
761 eeh_ops->write_config(edev, PCI_COMMAND, 4, cmd); in eeh_restore_device_bars()
773 static void eeh_restore_one_device_bars(struct eeh_dev *edev, void *flag) in eeh_restore_one_device_bars() argument
776 if (edev->mode & EEH_DEV_BRIDGE) in eeh_restore_one_device_bars()
777 eeh_restore_bridge_bars(edev); in eeh_restore_one_device_bars()
779 eeh_restore_device_bars(edev); in eeh_restore_one_device_bars()
782 eeh_ops->restore_config(edev); in eeh_restore_one_device_bars()
850 struct eeh_dev *edev; in eeh_pe_bus_get() local
861 edev = list_first_entry_or_null(&pe->edevs, struct eeh_dev, entry); in eeh_pe_bus_get()
862 pdev = eeh_dev_to_pci_dev(edev); in eeh_pe_bus_get()