61 u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr)  in cbe_read_phys_ctr()  argument
65 	if (phys_ctr < NR_PHYS_CTRS) {  in cbe_read_phys_ctr()
69 		if (val_in_latch & (1 << phys_ctr)) {  in cbe_read_phys_ctr()
70 			READ_SHADOW_REG(val, pm_ctr[phys_ctr]);  in cbe_read_phys_ctr()
72 			READ_MMIO_UPPER32(val, pm_ctr[phys_ctr]);  in cbe_read_phys_ctr()
80 void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val)  in cbe_write_phys_ctr()  argument
85 	if (phys_ctr < NR_PHYS_CTRS) {  in cbe_write_phys_ctr()
90 		WRITE_WO_MMIO(pm_ctr[phys_ctr], val);  in cbe_write_phys_ctr()
101 			shadow_regs->counter_value_in_latch |= (1 << phys_ctr);  in cbe_write_phys_ctr()
116 	u32 phys_ctr = ctr & (NR_PHYS_CTRS - 1);  in cbe_read_ctr()  local
118 	val = cbe_read_phys_ctr(cpu, phys_ctr);  in cbe_read_ctr()
120 	if (cbe_get_ctr_size(cpu, phys_ctr) == 16)  in cbe_read_ctr()
129 	u32 phys_ctr;  in cbe_write_ctr()  local
132 	phys_ctr = ctr & (NR_PHYS_CTRS - 1);  in cbe_write_ctr()
134 	if (cbe_get_ctr_size(cpu, phys_ctr) == 16) {  in cbe_write_ctr()
135 		phys_val = cbe_read_phys_ctr(cpu, phys_ctr);  in cbe_write_ctr()
143 	cbe_write_phys_ctr(cpu, phys_ctr, val);  in cbe_write_ctr()
258 u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr)  in cbe_get_ctr_size()  argument
262 	if (phys_ctr < NR_PHYS_CTRS) {  in cbe_get_ctr_size()
264 		size = (pm_ctrl & CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32;  in cbe_get_ctr_size()
271 void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size)  in cbe_set_ctr_size()  argument
275 	if (phys_ctr < NR_PHYS_CTRS) {  in cbe_set_ctr_size()
279 			pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr);  in cbe_set_ctr_size()
283 			pm_ctrl &= ~CBE_PM_16BIT_CTR(phys_ctr);  in cbe_set_ctr_size()