Lines Matching refs:RC1
44 #define RC1 %ymm6 macro
574 read_blocks(RA1, RB1, RC1, RD1, RK0, RK1, RK2);
611 write_blocks(RA1, RB1, RC1, RD1, RK0, RK1, RK2);
628 read_blocks(RA1, RB1, RC1, RD1, RK0, RK1, RK2);
665 write_blocks(RC1, RD1, RB1, RE1, RK0, RK1, RK2);
681 load_16way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
685 store_16way(%rsi, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
703 load_16way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
707 store_16way(%rsi, RC1, RD1, RB1, RE1, RC2, RD2, RB2, RE2);
725 load_16way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
729 store_cbc_16way(%rdx, %rsi, RC1, RD1, RB1, RE1, RC2, RD2, RB2, RE2,
749 load_ctr_16way(%rcx, .Lbswap128_mask, RA1, RB1, RC1, RD1, RA2, RB2, RC2,
755 store_ctr_16way(%rdx, %rsi, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
774 load_xts_16way(%rcx, %rdx, %rsi, RA1, RB1, RC1, RD1, RA2, RB2, RC2,
781 store_xts_16way(%rsi, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
800 load_xts_16way(%rcx, %rdx, %rsi, RA1, RB1, RC1, RD1, RA2, RB2, RC2,
807 store_xts_16way(%rsi, RC1, RD1, RB1, RE1, RC2, RD2, RB2, RE2);