Lines Matching refs:d
182 static const char *ti_adpll_clk_get_name(struct ti_adpll_data *d, in ti_adpll_clk_get_name() argument
190 err = of_property_read_string_index(d->np, in ti_adpll_clk_get_name()
197 name = devm_kasprintf(d->dev, GFP_KERNEL, "%08lx.adpll.%s", in ti_adpll_clk_get_name()
198 d->pa, postfix); in ti_adpll_clk_get_name()
206 static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock, in ti_adpll_setup_clock() argument
214 d->clocks[index].clk = clock; in ti_adpll_setup_clock()
215 d->clocks[index].unregister = unregister; in ti_adpll_setup_clock()
221 dev_warn(d->dev, "clock %s con_id lookup may fail\n", in ti_adpll_setup_clock()
223 snprintf(con_id, 16, "pll%03lx%s", d->pa & 0xfff, postfix + 1); in ti_adpll_setup_clock()
227 d->clocks[index].cl = cl; in ti_adpll_setup_clock()
229 dev_warn(d->dev, "no con_id for clock %s\n", name); in ti_adpll_setup_clock()
235 d->outputs.clks[output_index] = clock; in ti_adpll_setup_clock()
236 d->outputs.clk_num++; in ti_adpll_setup_clock()
241 static int ti_adpll_init_divider(struct ti_adpll_data *d, in ti_adpll_init_divider() argument
253 child_name = ti_adpll_clk_get_name(d, output_index, name); in ti_adpll_init_divider()
258 clock = clk_register_divider(d->dev, child_name, parent_name, 0, in ti_adpll_init_divider()
260 &d->lock); in ti_adpll_init_divider()
262 dev_err(d->dev, "failed to register divider %s: %li\n", in ti_adpll_init_divider()
267 return ti_adpll_setup_clock(d, clock, index, output_index, child_name, in ti_adpll_init_divider()
271 static int ti_adpll_init_mux(struct ti_adpll_data *d, in ti_adpll_init_mux() argument
282 child_name = ti_adpll_clk_get_name(d, -ENODEV, name); in ti_adpll_init_mux()
287 clock = clk_register_mux(d->dev, child_name, parents, 2, 0, in ti_adpll_init_mux()
288 reg, shift, 1, 0, &d->lock); in ti_adpll_init_mux()
290 dev_err(d->dev, "failed to register mux %s: %li\n", in ti_adpll_init_mux()
295 return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name, in ti_adpll_init_mux()
299 static int ti_adpll_init_gate(struct ti_adpll_data *d, in ti_adpll_init_gate() argument
311 child_name = ti_adpll_clk_get_name(d, output_index, name); in ti_adpll_init_gate()
316 clock = clk_register_gate(d->dev, child_name, parent_name, 0, in ti_adpll_init_gate()
318 &d->lock); in ti_adpll_init_gate()
320 dev_err(d->dev, "failed to register gate %s: %li\n", in ti_adpll_init_gate()
325 return ti_adpll_setup_clock(d, clock, index, output_index, child_name, in ti_adpll_init_gate()
329 static int ti_adpll_init_fixed_factor(struct ti_adpll_data *d, in ti_adpll_init_fixed_factor() argument
340 child_name = ti_adpll_clk_get_name(d, -ENODEV, name); in ti_adpll_init_fixed_factor()
345 clock = clk_register_fixed_factor(d->dev, child_name, parent_name, in ti_adpll_init_fixed_factor()
350 return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name, in ti_adpll_init_fixed_factor()
354 static void ti_adpll_set_idle_bypass(struct ti_adpll_data *d) in ti_adpll_set_idle_bypass() argument
359 spin_lock_irqsave(&d->lock, flags); in ti_adpll_set_idle_bypass()
360 v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_set_idle_bypass()
362 writel_relaxed(v, d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_set_idle_bypass()
363 spin_unlock_irqrestore(&d->lock, flags); in ti_adpll_set_idle_bypass()
366 static void ti_adpll_clear_idle_bypass(struct ti_adpll_data *d) in ti_adpll_clear_idle_bypass() argument
371 spin_lock_irqsave(&d->lock, flags); in ti_adpll_clear_idle_bypass()
372 v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_clear_idle_bypass()
374 writel_relaxed(v, d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_clear_idle_bypass()
375 spin_unlock_irqrestore(&d->lock, flags); in ti_adpll_clear_idle_bypass()
378 static bool ti_adpll_clock_is_bypass(struct ti_adpll_data *d) in ti_adpll_clock_is_bypass() argument
382 v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET); in ti_adpll_clock_is_bypass()
392 static bool ti_adpll_is_locked(struct ti_adpll_data *d) in ti_adpll_is_locked() argument
394 u32 v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET); in ti_adpll_is_locked()
399 static int ti_adpll_wait_lock(struct ti_adpll_data *d) in ti_adpll_wait_lock() argument
404 if (ti_adpll_is_locked(d)) in ti_adpll_wait_lock()
409 dev_err(d->dev, "pll failed to lock\n"); in ti_adpll_wait_lock()
416 struct ti_adpll_data *d = to_adpll(dco); in ti_adpll_prepare() local
418 ti_adpll_clear_idle_bypass(d); in ti_adpll_prepare()
419 ti_adpll_wait_lock(d); in ti_adpll_prepare()
427 struct ti_adpll_data *d = to_adpll(dco); in ti_adpll_unprepare() local
429 ti_adpll_set_idle_bypass(d); in ti_adpll_unprepare()
435 struct ti_adpll_data *d = to_adpll(dco); in ti_adpll_is_prepared() local
437 return ti_adpll_is_locked(d); in ti_adpll_is_prepared()
448 struct ti_adpll_data *d = to_adpll(dco); in ti_adpll_recalc_rate() local
453 if (ti_adpll_clock_is_bypass(d)) in ti_adpll_recalc_rate()
456 spin_lock_irqsave(&d->lock, flags); in ti_adpll_recalc_rate()
457 frac_m = readl_relaxed(d->regs + ADPLL_FRACDIV_OFFSET); in ti_adpll_recalc_rate()
459 rate = (u64)readw_relaxed(d->regs + ADPLL_MN2DIV_OFFSET) << 18; in ti_adpll_recalc_rate()
462 divider = (readw_relaxed(d->regs + ADPLL_M2NDIV_OFFSET) + 1) << 18; in ti_adpll_recalc_rate()
463 spin_unlock_irqrestore(&d->lock, flags); in ti_adpll_recalc_rate()
467 if (d->c->is_type_s) { in ti_adpll_recalc_rate()
468 v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_recalc_rate()
491 static int ti_adpll_init_dco(struct ti_adpll_data *d) in ti_adpll_init_dco() argument
498 d->outputs.clks = devm_kcalloc(d->dev, in ti_adpll_init_dco()
502 if (!d->outputs.clks) in ti_adpll_init_dco()
505 if (d->c->output_index < 0) in ti_adpll_init_dco()
510 init.name = ti_adpll_clk_get_name(d, d->c->output_index, postfix); in ti_adpll_init_dco()
514 init.parent_names = d->parent_names; in ti_adpll_init_dco()
515 init.num_parents = d->c->nr_max_inputs; in ti_adpll_init_dco()
518 d->dco.hw.init = &init; in ti_adpll_init_dco()
520 if (d->c->is_type_s) in ti_adpll_init_dco()
526 err = ti_adpll_init_divider(d, TI_ADPLL_N2, -ENODEV, "n2", in ti_adpll_init_dco()
527 d->parent_clocks[TI_ADPLL_CLKINP], in ti_adpll_init_dco()
528 d->regs + ADPLL_MN2DIV_OFFSET, in ti_adpll_init_dco()
533 clock = devm_clk_register(d->dev, &d->dco.hw); in ti_adpll_init_dco()
537 return ti_adpll_setup_clock(d, clock, TI_ADPLL_DCO, d->c->output_index, in ti_adpll_init_dco()
574 struct ti_adpll_data *d = co->adpll; in ti_adpll_clkout_get_parent() local
576 return ti_adpll_clock_is_bypass(d); in ti_adpll_clkout_get_parent()
579 static int ti_adpll_init_clkout(struct ti_adpll_data *d, in ti_adpll_init_clkout() argument
593 co = devm_kzalloc(d->dev, sizeof(*co), GFP_KERNEL); in ti_adpll_init_clkout()
596 co->adpll = d; in ti_adpll_init_clkout()
598 err = of_property_read_string_index(d->np, in ti_adpll_init_clkout()
605 ops = devm_kzalloc(d->dev, sizeof(*ops), GFP_KERNEL); in ti_adpll_init_clkout()
621 co->gate.lock = &d->lock; in ti_adpll_init_clkout()
622 co->gate.reg = d->regs + ADPLL_CLKCTRL_OFFSET; in ti_adpll_init_clkout()
629 clock = devm_clk_register(d->dev, &co->hw); in ti_adpll_init_clkout()
631 dev_err(d->dev, "failed to register output %s: %li\n", in ti_adpll_init_clkout()
636 return ti_adpll_setup_clock(d, clock, index, output_index, child_name, in ti_adpll_init_clkout()
640 static int ti_adpll_init_children_adpll_s(struct ti_adpll_data *d) in ti_adpll_init_children_adpll_s() argument
644 if (!d->c->is_type_s) in ti_adpll_init_children_adpll_s()
648 err = ti_adpll_init_mux(d, TI_ADPLL_BYPASS, "bypass", in ti_adpll_init_children_adpll_s()
649 d->clocks[TI_ADPLL_N2].clk, in ti_adpll_init_children_adpll_s()
650 d->parent_clocks[TI_ADPLL_CLKINPULOW], in ti_adpll_init_children_adpll_s()
651 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_s()
657 err = ti_adpll_init_divider(d, TI_ADPLL_M2, -ENODEV, "m2", in ti_adpll_init_children_adpll_s()
658 d->clocks[TI_ADPLL_DCO].clk, in ti_adpll_init_children_adpll_s()
659 d->regs + ADPLL_M2NDIV_OFFSET, in ti_adpll_init_children_adpll_s()
667 err = ti_adpll_init_fixed_factor(d, TI_ADPLL_DIV2, "div2", in ti_adpll_init_children_adpll_s()
668 d->clocks[TI_ADPLL_M2].clk, in ti_adpll_init_children_adpll_s()
674 err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT, TI_ADPLL_S_CLKOUT, in ti_adpll_init_children_adpll_s()
676 d->clocks[TI_ADPLL_DIV2].clk, in ti_adpll_init_children_adpll_s()
677 d->clocks[TI_ADPLL_BYPASS].clk); in ti_adpll_init_children_adpll_s()
682 err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT2, TI_ADPLL_S_CLKOUTX2, 0, in ti_adpll_init_children_adpll_s()
683 "clkout2", d->clocks[TI_ADPLL_M2].clk, in ti_adpll_init_children_adpll_s()
684 d->clocks[TI_ADPLL_BYPASS].clk); in ti_adpll_init_children_adpll_s()
689 if (d->parent_clocks[TI_ADPLL_CLKINPHIF]) { in ti_adpll_init_children_adpll_s()
690 err = ti_adpll_init_mux(d, TI_ADPLL_HIF, "hif", in ti_adpll_init_children_adpll_s()
691 d->clocks[TI_ADPLL_DCO].clk, in ti_adpll_init_children_adpll_s()
692 d->parent_clocks[TI_ADPLL_CLKINPHIF], in ti_adpll_init_children_adpll_s()
693 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_s()
700 err = ti_adpll_init_divider(d, TI_ADPLL_M3, TI_ADPLL_S_CLKOUTHIF, "m3", in ti_adpll_init_children_adpll_s()
701 d->clocks[TI_ADPLL_HIF].clk, in ti_adpll_init_children_adpll_s()
702 d->regs + ADPLL_M3DIV_OFFSET, in ti_adpll_init_children_adpll_s()
714 static int ti_adpll_init_children_adpll_lj(struct ti_adpll_data *d) in ti_adpll_init_children_adpll_lj() argument
718 if (d->c->is_type_s) in ti_adpll_init_children_adpll_lj()
722 err = ti_adpll_init_gate(d, TI_ADPLL_DCO_GATE, TI_ADPLL_LJ_CLKDCOLDO, in ti_adpll_init_children_adpll_lj()
723 "clkdcoldo", d->clocks[TI_ADPLL_DCO].clk, in ti_adpll_init_children_adpll_lj()
724 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_lj()
730 err = ti_adpll_init_divider(d, TI_ADPLL_M2, -ENODEV, in ti_adpll_init_children_adpll_lj()
731 "m2", d->clocks[TI_ADPLL_DCO].clk, in ti_adpll_init_children_adpll_lj()
732 d->regs + ADPLL_M2NDIV_OFFSET, in ti_adpll_init_children_adpll_lj()
740 err = ti_adpll_init_gate(d, TI_ADPLL_M2_GATE, TI_ADPLL_LJ_CLKOUTLDO, in ti_adpll_init_children_adpll_lj()
741 "clkoutldo", d->clocks[TI_ADPLL_M2].clk, in ti_adpll_init_children_adpll_lj()
742 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_lj()
749 err = ti_adpll_init_mux(d, TI_ADPLL_BYPASS, "bypass", in ti_adpll_init_children_adpll_lj()
750 d->clocks[TI_ADPLL_N2].clk, in ti_adpll_init_children_adpll_lj()
751 d->parent_clocks[TI_ADPLL_CLKINPULOW], in ti_adpll_init_children_adpll_lj()
752 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_lj()
758 err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT, TI_ADPLL_S_CLKOUT, in ti_adpll_init_children_adpll_lj()
760 d->clocks[TI_ADPLL_M2].clk, in ti_adpll_init_children_adpll_lj()
761 d->clocks[TI_ADPLL_BYPASS].clk); in ti_adpll_init_children_adpll_lj()
768 static void ti_adpll_free_resources(struct ti_adpll_data *d) in ti_adpll_free_resources() argument
773 struct ti_adpll_clock *ac = &d->clocks[i]; in ti_adpll_free_resources()
794 static int ti_adpll_init_registers(struct ti_adpll_data *d) in ti_adpll_init_registers() argument
798 if (d->c->is_type_s) { in ti_adpll_init_registers()
800 ti_adpll_unlock_all(d->iobase + ADPLL_PLLSS_MMR_LOCK_OFFSET); in ti_adpll_init_registers()
803 d->regs = d->iobase + register_offset + ADPLL_PWRCTRL_OFFSET; in ti_adpll_init_registers()
808 static int ti_adpll_init_inputs(struct ti_adpll_data *d) in ti_adpll_init_inputs() argument
814 nr_inputs = of_clk_get_parent_count(d->np); in ti_adpll_init_inputs()
815 if (nr_inputs < d->c->nr_max_inputs) { in ti_adpll_init_inputs()
816 dev_err(d->dev, error, nr_inputs); in ti_adpll_init_inputs()
819 of_clk_parent_fill(d->np, d->parent_names, nr_inputs); in ti_adpll_init_inputs()
821 clock = devm_clk_get(d->dev, d->parent_names[0]); in ti_adpll_init_inputs()
823 dev_err(d->dev, "could not get clkinp\n"); in ti_adpll_init_inputs()
826 d->parent_clocks[TI_ADPLL_CLKINP] = clock; in ti_adpll_init_inputs()
828 clock = devm_clk_get(d->dev, d->parent_names[1]); in ti_adpll_init_inputs()
830 dev_err(d->dev, "could not get clkinpulow clock\n"); in ti_adpll_init_inputs()
833 d->parent_clocks[TI_ADPLL_CLKINPULOW] = clock; in ti_adpll_init_inputs()
835 if (d->c->is_type_s) { in ti_adpll_init_inputs()
836 clock = devm_clk_get(d->dev, d->parent_names[2]); in ti_adpll_init_inputs()
838 dev_err(d->dev, "could not get clkinphif clock\n"); in ti_adpll_init_inputs()
841 d->parent_clocks[TI_ADPLL_CLKINPHIF] = clock; in ti_adpll_init_inputs()
874 struct ti_adpll_data *d; in ti_adpll_probe() local
884 d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL); in ti_adpll_probe()
885 if (!d) in ti_adpll_probe()
887 d->dev = dev; in ti_adpll_probe()
888 d->np = node; in ti_adpll_probe()
889 d->c = pdata; in ti_adpll_probe()
890 dev_set_drvdata(d->dev, d); in ti_adpll_probe()
891 spin_lock_init(&d->lock); in ti_adpll_probe()
896 d->pa = res->start; in ti_adpll_probe()
898 d->iobase = devm_ioremap_resource(dev, res); in ti_adpll_probe()
899 if (IS_ERR(d->iobase)) { in ti_adpll_probe()
901 PTR_ERR(d->iobase)); in ti_adpll_probe()
902 return PTR_ERR(d->iobase); in ti_adpll_probe()
905 err = ti_adpll_init_registers(d); in ti_adpll_probe()
909 err = ti_adpll_init_inputs(d); in ti_adpll_probe()
913 d->clocks = devm_kcalloc(d->dev, in ti_adpll_probe()
917 if (!d->clocks) in ti_adpll_probe()
920 err = ti_adpll_init_dco(d); in ti_adpll_probe()
926 err = ti_adpll_init_children_adpll_s(d); in ti_adpll_probe()
929 err = ti_adpll_init_children_adpll_lj(d); in ti_adpll_probe()
933 err = of_clk_add_provider(d->np, of_clk_src_onecell_get, &d->outputs); in ti_adpll_probe()
941 ti_adpll_free_resources(d); in ti_adpll_probe()
948 struct ti_adpll_data *d = dev_get_drvdata(&pdev->dev); in ti_adpll_remove() local
950 ti_adpll_free_resources(d); in ti_adpll_remove()