54 	struct ingenic_tcu *tcu = ingenic_tcu;  in ingenic_tcu_timer_read()  local
57 	regmap_read(tcu->map, TCU_REG_TCNTc(tcu->cs_channel), &count);  in ingenic_tcu_timer_read()
82 	struct ingenic_tcu *tcu = to_ingenic_tcu(timer);  in ingenic_tcu_cevt_set_state_shutdown()  local
84 	regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel));  in ingenic_tcu_cevt_set_state_shutdown()
93 	struct ingenic_tcu *tcu = to_ingenic_tcu(timer);  in ingenic_tcu_cevt_set_next()  local
98 	regmap_write(tcu->map, TCU_REG_TDFRc(timer->channel), next);  in ingenic_tcu_cevt_set_next()
99 	regmap_write(tcu->map, TCU_REG_TCNTc(timer->channel), 0);  in ingenic_tcu_cevt_set_next()
100 	regmap_write(tcu->map, TCU_REG_TESR, BIT(timer->channel));  in ingenic_tcu_cevt_set_next()
115 	struct ingenic_tcu *tcu = to_ingenic_tcu(timer);  in ingenic_tcu_cevt_cb()  local
118 	regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel));  in ingenic_tcu_cevt_cb()
143 	struct ingenic_tcu *tcu = ingenic_tcu;  in ingenic_tcu_setup_cevt()  local
144 	struct ingenic_tcu_timer *timer = &tcu->timers[cpu];  in ingenic_tcu_setup_cevt()
150 	timer->clk = ingenic_tcu_get_clock(tcu->np, timer->channel);  in ingenic_tcu_setup_cevt()
164 	domain = irq_find_host(tcu->np);  in ingenic_tcu_setup_cevt()
205 					       struct ingenic_tcu *tcu)  in ingenic_tcu_clocksource_init()  argument
207 	unsigned int channel = tcu->cs_channel;  in ingenic_tcu_clocksource_init()
208 	struct clocksource *cs = &tcu->cs;  in ingenic_tcu_clocksource_init()
212 	tcu->cs_clk = ingenic_tcu_get_clock(np, channel);  in ingenic_tcu_clocksource_init()
213 	if (IS_ERR(tcu->cs_clk))  in ingenic_tcu_clocksource_init()
214 		return PTR_ERR(tcu->cs_clk);  in ingenic_tcu_clocksource_init()
216 	err = clk_prepare_enable(tcu->cs_clk);  in ingenic_tcu_clocksource_init()
220 	rate = clk_get_rate(tcu->cs_clk);  in ingenic_tcu_clocksource_init()
227 	regmap_update_bits(tcu->map, TCU_REG_TCSRc(channel),  in ingenic_tcu_clocksource_init()
231 	regmap_write(tcu->map, TCU_REG_TDFRc(channel), 0xffff);  in ingenic_tcu_clocksource_init()
232 	regmap_write(tcu->map, TCU_REG_TCNTc(channel), 0);  in ingenic_tcu_clocksource_init()
235 	regmap_write(tcu->map, TCU_REG_TESR, BIT(channel));  in ingenic_tcu_clocksource_init()
250 	clk_disable_unprepare(tcu->cs_clk);  in ingenic_tcu_clocksource_init()
252 	clk_put(tcu->cs_clk);  in ingenic_tcu_clocksource_init()
277 	struct ingenic_tcu *tcu;  in ingenic_tcu_init()  local
289 	tcu = kzalloc(struct_size(tcu, timers, num_possible_cpus()),  in ingenic_tcu_init()
291 	if (!tcu)  in ingenic_tcu_init()
298 	tcu->pwm_channels_mask = GENMASK(soc_info->num_channels - 1,  in ingenic_tcu_init()
301 			     (u32 *)&tcu->pwm_channels_mask);  in ingenic_tcu_init()
304 	if (hweight8(tcu->pwm_channels_mask) >  in ingenic_tcu_init()
307 			tcu->pwm_channels_mask);  in ingenic_tcu_init()
312 	tcu->map = map;  in ingenic_tcu_init()
313 	tcu->np = np;  in ingenic_tcu_init()
314 	ingenic_tcu = tcu;  in ingenic_tcu_init()
317 		timer = &tcu->timers[cpu];  in ingenic_tcu_init()
320 		timer->channel = find_next_zero_bit(&tcu->pwm_channels_mask,  in ingenic_tcu_init()
326 	tcu->cs_channel = find_next_zero_bit(&tcu->pwm_channels_mask,  in ingenic_tcu_init()
330 	ret = ingenic_tcu_clocksource_init(np, tcu);  in ingenic_tcu_init()
345 	rate = clk_get_rate(tcu->cs_clk);  in ingenic_tcu_init()
351 	clocksource_unregister(&tcu->cs);  in ingenic_tcu_init()
352 	clk_disable_unprepare(tcu->cs_clk);  in ingenic_tcu_init()
353 	clk_put(tcu->cs_clk);  in ingenic_tcu_init()
355 	kfree(tcu);  in ingenic_tcu_init()
373 	struct ingenic_tcu *tcu = dev_get_drvdata(dev);  in ingenic_tcu_suspend()  local
376 	clk_disable(tcu->cs_clk);  in ingenic_tcu_suspend()
379 		clk_disable(tcu->timers[cpu].clk);  in ingenic_tcu_suspend()
386 	struct ingenic_tcu *tcu = dev_get_drvdata(dev);  in ingenic_tcu_resume()  local
391 		ret = clk_enable(tcu->timers[cpu].clk);  in ingenic_tcu_resume()
396 	ret = clk_enable(tcu->cs_clk);  in ingenic_tcu_resume()
404 		clk_disable(tcu->timers[cpu - 1].clk);  in ingenic_tcu_resume()