Lines Matching refs:gpc
1174 gf100_gr_trap_gpc_rop(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc_rop() argument
1181 trap[0] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0420)) & 0x3fffffff; in gf100_gr_trap_gpc_rop()
1182 trap[1] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0434)); in gf100_gr_trap_gpc_rop()
1183 trap[2] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0438)); in gf100_gr_trap_gpc_rop()
1184 trap[3] = nvkm_rd32(device, GPC_UNIT(gpc, 0x043c)); in gf100_gr_trap_gpc_rop()
1190 gpc, trap[0], error, trap[1] & 0xffff, trap[1] >> 16, in gf100_gr_trap_gpc_rop()
1192 nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000); in gf100_gr_trap_gpc_rop()
1235 gf100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_mp() argument
1239 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x648)); in gf100_gr_trap_mp()
1240 u32 gerr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x650)); in gf100_gr_trap_mp()
1249 gpc, tpc, gerr, glob, werr, warp ? warp->name : ""); in gf100_gr_trap_mp()
1251 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x648), 0x00000000); in gf100_gr_trap_mp()
1252 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x650), gerr); in gf100_gr_trap_mp()
1256 gf100_gr_trap_tpc(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_tpc() argument
1260 u32 stat = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0508)); in gf100_gr_trap_tpc()
1263 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0224)); in gf100_gr_trap_tpc()
1264 nvkm_error(subdev, "GPC%d/TPC%d/TEX: %08x\n", gpc, tpc, trap); in gf100_gr_trap_tpc()
1265 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x0224), 0xc0000000); in gf100_gr_trap_tpc()
1270 gr->func->trap_mp(gr, gpc, tpc); in gf100_gr_trap_tpc()
1275 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0084)); in gf100_gr_trap_tpc()
1276 nvkm_error(subdev, "GPC%d/TPC%d/POLY: %08x\n", gpc, tpc, trap); in gf100_gr_trap_tpc()
1277 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x0084), 0xc0000000); in gf100_gr_trap_tpc()
1282 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x048c)); in gf100_gr_trap_tpc()
1283 nvkm_error(subdev, "GPC%d/TPC%d/L1C: %08x\n", gpc, tpc, trap); in gf100_gr_trap_tpc()
1284 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x048c), 0xc0000000); in gf100_gr_trap_tpc()
1289 u32 trap = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0430)); in gf100_gr_trap_tpc()
1290 nvkm_error(subdev, "GPC%d/TPC%d/MPC: %08x\n", gpc, tpc, trap); in gf100_gr_trap_tpc()
1291 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x0430), 0xc0000000); in gf100_gr_trap_tpc()
1296 nvkm_error(subdev, "GPC%d/TPC%d/%08x: unknown\n", gpc, tpc, stat); in gf100_gr_trap_tpc()
1301 gf100_gr_trap_gpc(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc() argument
1305 u32 stat = nvkm_rd32(device, GPC_UNIT(gpc, 0x2c90)); in gf100_gr_trap_gpc()
1309 gf100_gr_trap_gpc_rop(gr, gpc); in gf100_gr_trap_gpc()
1314 u32 trap = nvkm_rd32(device, GPC_UNIT(gpc, 0x0900)); in gf100_gr_trap_gpc()
1315 nvkm_error(subdev, "GPC%d/ZCULL: %08x\n", gpc, trap); in gf100_gr_trap_gpc()
1316 nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000); in gf100_gr_trap_gpc()
1321 u32 trap = nvkm_rd32(device, GPC_UNIT(gpc, 0x1028)); in gf100_gr_trap_gpc()
1322 nvkm_error(subdev, "GPC%d/CCACHE: %08x\n", gpc, trap); in gf100_gr_trap_gpc()
1323 nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000); in gf100_gr_trap_gpc()
1328 u32 trap = nvkm_rd32(device, GPC_UNIT(gpc, 0x0824)); in gf100_gr_trap_gpc()
1329 nvkm_error(subdev, "GPC%d/ESETUP: %08x\n", gpc, trap); in gf100_gr_trap_gpc()
1330 nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000); in gf100_gr_trap_gpc()
1334 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_gr_trap_gpc()
1337 gf100_gr_trap_tpc(gr, gpc, tpc); in gf100_gr_trap_gpc()
1338 nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), mask); in gf100_gr_trap_gpc()
1344 nvkm_error(subdev, "GPC%d/%08x: unknown\n", gpc, stat); in gf100_gr_trap_gpc()
1355 int rop, gpc; in gf100_gr_trap_intr() local
1443 for (gpc = 0; stat && gpc < gr->gpc_nr; gpc++) { in gf100_gr_trap_intr()
1444 u32 mask = 0x00000001 << gpc; in gf100_gr_trap_intr()
1446 gf100_gr_trap_gpc(gr, gpc); in gf100_gr_trap_intr()
1498 u32 gpc; in gf100_gr_ctxctl_debug() local
1501 for (gpc = 0; gpc < gpcnr; gpc++) in gf100_gr_ctxctl_debug()
1502 gf100_gr_ctxctl_debug_unit(gr, 0x502000 + (gpc * 0x8000)); in gf100_gr_ctxctl_debug()
1853 int tpc, gpc; in gf100_gr_oneinit_sm_id() local
1855 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_oneinit_sm_id()
1856 if (tpc < gr->tpc_nr[gpc]) { in gf100_gr_oneinit_sm_id()
1857 gr->sm[gr->sm_nr].gpc = gpc; in gf100_gr_oneinit_sm_id()
2129 int gpc, i, j; in gf100_gr_init_num_tpc_per_gpc() local
2132 for (gpc = 0, i = 0; i < 4; i++) { in gf100_gr_init_num_tpc_per_gpc()
2133 for (data = 0, j = 0; j < 8 && gpc < gr->gpc_nr; j++, gpc++) in gf100_gr_init_num_tpc_per_gpc()
2134 data |= gr->tpc_nr[gpc] << (j * 4); in gf100_gr_init_num_tpc_per_gpc()
2149 gf100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_init_shader_exceptions() argument
2152 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe); in gf100_gr_init_shader_exceptions()
2153 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f); in gf100_gr_init_shader_exceptions()
2157 gf100_gr_init_tex_hww_esr(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_init_tex_hww_esr() argument
2160 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000); in gf100_gr_init_tex_hww_esr()
2174 int gpc, tpc; in gf100_gr_init_419cc0() local
2178 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init_419cc0()
2179 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) in gf100_gr_init_419cc0()
2180 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000); in gf100_gr_init_419cc0()
2226 u8 bank[GPC_MAX] = {}, gpc, i, j; in gf100_gr_init_zcull() local
2237 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init_zcull()
2238 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), in gf100_gr_init_zcull()
2239 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); in gf100_gr_init_zcull()
2240 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | in gf100_gr_init_zcull()
2242 nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); in gf100_gr_init_zcull()
2259 int gpc, tpc, rop; in gf100_gr_init() local
2330 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_gr_init()
2331 nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000); in gf100_gr_init()
2332 nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000); in gf100_gr_init()
2333 nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000); in gf100_gr_init()
2334 nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000); in gf100_gr_init()
2335 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_gr_init()
2336 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff); in gf100_gr_init()
2337 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff); in gf100_gr_init()
2339 gr->func->init_tex_hww_esr(gr, gpc, tpc); in gf100_gr_init()
2340 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000); in gf100_gr_init()
2342 gr->func->init_504430(gr, gpc, tpc); in gf100_gr_init()
2343 gr->func->init_shader_exceptions(gr, gpc, tpc); in gf100_gr_init()
2345 nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), 0xffffffff); in gf100_gr_init()
2346 nvkm_wr32(device, GPC_UNIT(gpc, 0x2c94), 0xffffffff); in gf100_gr_init()