Lines Matching refs:hdmi_read_reg
70 u32 cnt = hdmi_read_reg(core->base, HDMI_CEC_RX_COUNT) & 0xff; in hdmi_cec_received_msg()
83 msg.msg[0] = hdmi_read_reg(core->base, in hdmi_cec_received_msg()
85 msg.msg[1] = hdmi_read_reg(core->base, in hdmi_cec_received_msg()
91 hdmi_read_reg(core->base, reg); in hdmi_cec_received_msg()
99 while (hdmi_read_reg(core->base, HDMI_CEC_RX_CONTROL) & 1) in hdmi_cec_received_msg()
105 cnt = hdmi_read_reg(core->base, HDMI_CEC_RX_COUNT) & 0xff; in hdmi_cec_received_msg()
111 u32 stat0 = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_0); in hdmi4_cec_irq()
112 u32 stat1 = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_1); in hdmi4_cec_irq()
122 u32 dbg3 = hdmi_read_reg(core->base, HDMI_CEC_DBG_3); in hdmi4_cec_irq()
142 temp = hdmi_read_reg(core->base, HDMI_CEC_DBG_3); in hdmi_cec_clear_tx_fifo()
159 temp = hdmi_read_reg(core->base, HDMI_CEC_RX_CONTROL); in hdmi_cec_clear_rx_fifo()
208 hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_1)); in hdmi_cec_adap_enable()
210 hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_0)); in hdmi_cec_adap_enable()
233 temp = hdmi_read_reg(core->base, HDMI_CEC_SETUP); in hdmi_cec_adap_enable()
243 temp = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_1); in hdmi_cec_adap_enable()
267 v = hdmi_read_reg(core->base, HDMI_CEC_CA_7_0); in hdmi_cec_adap_log_addr()
271 v = hdmi_read_reg(core->base, HDMI_CEC_CA_15_8); in hdmi_cec_adap_log_addr()